On Mon, Mar 3, 2014 at 12:06 AM, Beniamino Galvani <b.galv...@gmail.com> wrote: > The irq line status must be updated after writes to the INT_CTL and > INT_STA registers. > > Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> > --- > hw/net/allwinner_emac.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/hw/net/allwinner_emac.c b/hw/net/allwinner_emac.c > index 91931ac..d780ba0 100644 > --- a/hw/net/allwinner_emac.c > +++ b/hw/net/allwinner_emac.c > @@ -391,9 +391,11 @@ static void aw_emac_write(void *opaque, hwaddr offset, > uint64_t value, > break; > case EMAC_INT_CTL_REG: > s->int_ctl = value; > + aw_emac_update_irq(s); > break; > case EMAC_INT_STA_REG: > s->int_sta &= ~value; > + aw_emac_update_irq(s); > break; > case EMAC_MAC_MADR_REG: > s->phy_target = value; > -- > 1.7.10.4 > >
