On Tue, Dec 22, 2009 at 1:02 AM, Richard Henderson <r...@twiddle.net> wrote:
> On 12/21/2009 03:08 PM, Laurent Desnogues wrote:
>>
>> If you wanted to use movcond, you'd have to make
>> cond + move a special case...
>
> You'd certainly want the ARM front-end to use movcond more often than that.
> For instance:
>
> addeq r1,r2,r3
> -->
> add_i32 tmp,r2,r3
> movcond_i32 r1,ZF,0,tmp,r1,eq
>
> You'd want to continue to use a branch around if the instruction has side
> effects like cpu fault (e.g. load, store) or updating flags.
>
> It ought not be very hard to arrange for something like
>
> if (cond != 0xe) {
> if (may_use_movcond(insn)) {
> s->condlabel = -1;
> /* Save the true destination register. */
> s->conddest = cpu_R[dest];
> /* Implement the instruction into a temporary. */
> cpu_R[dest] = tcg_temp_new();
> } else {
> s->condlabel = gen_new_label();
> ArmConditional cmp = gen_test_cc(cond ^ 1);
> tcg_gen_brcondi_i32(cmp.cond, cmp.reg, 0, s->condlabel);
> }
> s->condjmp = 1;
> }
>
> // ... implement the instruction as we currently do.
>
> if (s->condjmp) {
> if (s->condlabel == -1) {
> /* Conditionally move the temporary result into the
> true destination register. */
> ArmConditional cmp = gen_test_cc(cond);
> tcg_gen_movcond_i32(cmp.cond, s->conddest, cmp.reg, 0,
> cpu_R[dest], s->conddest);
> tcg_temp_free(cpu_R[dest]);
> /* Restore the true destination register. */
> cpu_R[dest] = s->conddest;
> } else {
> tcg_set_label(d->condlabel);
> }
> }
I agree, that looks nice. But I'll let you dig into ARM instruction
encoding and see how to implement may_use_movcond and
getting the correct dest to save is not that cheap (and before
you get back to me, yes, you could only consider a small
subset of the instructions for which you want to do that :-).
There's a point I have kept on insisting on that you keep on
not answering :-) How does all of that perform in practice?
We can discuss forever, as long as it isn't measured, we are
just guessing.
Laurent
