On 18 February 2014 09:55, Peter Maydell <peter.mayd...@linaro.org> wrote:
> Commit 40d225009ef accidentally changed the behaviour of
> gic_acknowledge_irq() for the NVIC. The NVIC doesn't have SGIs,
> so this meant we hit an assertion:
> gic_acknowledge_irq: Assertion `s->sgi_pending[irq][cpu] != 0' failed.
>
> Return NVIC acknowledge-irq to its previous behaviour, like 11MPCore.
>
> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
> ---
> Oops. I think I mentioned that NVIC should behave like 11MPcore
> in one of the rounds of code review, but then didn't spot that
> this if() had been missed. We get the checks right elsewhere.
>
That was my bad entirely. Sorry for missing that one.
> hw/intc/arm_gic.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
> index 93eaa6b..955b8d4 100644
> --- a/hw/intc/arm_gic.c
> +++ b/hw/intc/arm_gic.c
> @@ -189,7 +189,7 @@ uint32_t gic_acknowledge_irq(GICState *s, int cpu)
> }
> s->last_active[irq][cpu] = s->running_irq[cpu];
>
> - if (s->revision == REV_11MPCORE) {
> + if (s->revision == REV_11MPCORE || s->revision == REV_NVIC) {
> /* Clear pending flags for both level and edge triggered interrupts.
> * Level triggered IRQs will be reasserted once they become inactive.
> */
> --
> 1.8.5
>
Thanks for the fix.
Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org>
