There are three separate architecture extensions for logical operations, BMI, BMI2, and TBM. The first two are supported on Intel Haswell and AMD Excavator, while slightly earlier AMD support only BMI and TBM.
The following adds support for the interesting BMI and BMI2 instructions, where it is easy to do so. Most of the rest of the new instructions are irrelevant to TCG. When I added support for the ANDC opcode, I noticed some optimization regressions when looking at ppc64 guest dumps. I will address these in a separate patch set. r~ Richard Henderson (5): disas/i386: Disassemble ANDN/SHLX/SHRX/SHAX tcg/i386: Move TCG_CT_CONST_* to tcg-target.c tcg/i386: Add tcg_out_vex_modrm tcg/i386: Use ANDN instruction tcg/i386: Use SHLX/SHRX/SARX instructions disas/i386.c | 146 +++++++++++++++++++++++++++++++++++++++++----- tcg/i386/tcg-target.c | 156 ++++++++++++++++++++++++++++++++++++++++++-------- tcg/i386/tcg-target.h | 9 ++- 3 files changed, 268 insertions(+), 43 deletions(-) -- 1.8.5.3
