On 01/10/2014 11:08 AM, Tom Musta wrote:
> +static void gen_fmrgow(DisasContext *ctx)
> +{
> + TCGv_i64 a1;
> + if (unlikely(!ctx->fpu_enabled)) {
> + gen_exception(ctx, POWERPC_EXCP_FPU);
> + return;
> + }
> + a1 = tcg_temp_new_i64();
> + tcg_gen_shli_i64(a1, cpu_fpr[rA(ctx->opcode)], 32);
> + tcg_gen_deposit_i64(cpu_fpr[rD(ctx->opcode)],
> + a1, cpu_fpr[rB(ctx->opcode)],
> + 0, 32);
> + tcg_temp_free_i64(a1);
> +}
Better use of the deposit when you use it for the shift also:
tcg_gen_deposit_i64(cpu_fpr[rD],
cpu_fpr[rB],
cpu_fpr[rA], 32, 32);
r~
