The original SeaBIOS code used the RamSize variable, that was used by SeaBIOS for the size of RAM below 4GB, not for all RAM. When copied to QEMU, the code was changed to use the full RAM size, and this broke the build_srat() code that handles the PCI hole.
This series fixes the problem by restoring the original behavior from SeaBIOS. Example Linux guest dmesg output when the bug is present (using -m 4G and 4 1GB NUMA nodes): e820: BIOS-provided physical RAM map: BIOS-e820: [mem 0x0000000000000000-0x000000000009fbff] usable BIOS-e820: [mem 0x000000000009fc00-0x000000000009ffff] reserved BIOS-e820: [mem 0x00000000000f0000-0x00000000000fffff] reserved BIOS-e820: [mem 0x0000000000100000-0x00000000dfffdfff] usable BIOS-e820: [mem 0x00000000dfffe000-0x00000000dfffffff] reserved BIOS-e820: [mem 0x00000000feffc000-0x00000000feffffff] reserved BIOS-e820: [mem 0x00000000fffc0000-0x00000000ffffffff] reserved BIOS-e820: [mem 0x0000000100000000-0x000000011fffffff] usable e820: update [mem 0x00000000-0x00000fff] usable ==> reserved e820: remove [mem 0x000a0000-0x000fffff] usable e820: last_pfn = 0x120000 max_arch_pfn = 0x400000000 e820: last_pfn = 0xdfffe max_arch_pfn = 0x400000000 ACPI: SRAT 00000000dffffc0e 00160 (v01 BOCHS BXPCSRAT 00000001 BXPC 00000001) SRAT: PXM 0 -> APIC 0x00 -> Node 0 SRAT: PXM 1 -> APIC 0x01 -> Node 1 SRAT: PXM 2 -> APIC 0x02 -> Node 2 SRAT: PXM 3 -> APIC 0x03 -> Node 3 SRAT: Node 0 PXM 0 [mem 0x00000000-0x0009ffff] SRAT: Node 0 PXM 0 [mem 0x00100000-0x3fffffff] SRAT: Node 1 PXM 1 [mem 0x40000000-0x7fffffff] SRAT: Node 2 PXM 2 [mem 0x80000000-0xbfffffff] SRAT: Node 3 PXM 3 [mem 0xc0000000-0xffffffff] NUMA: nodes only cover 3583MB of your 4095MB e820 RAM. Not used. e820: [mem 0xe0000000-0xfeffbfff] available for PCI devices e820: reserve RAM buffer [mem 0x0009fc00-0x0009ffff] e820: reserve RAM buffer [mem 0xdfffe000-0xdfffffff] Output after the series is applied: e820: BIOS-provided physical RAM map: BIOS-e820: [mem 0x0000000000000000-0x000000000009fbff] usable BIOS-e820: [mem 0x000000000009fc00-0x000000000009ffff] reserved BIOS-e820: [mem 0x00000000000f0000-0x00000000000fffff] reserved BIOS-e820: [mem 0x0000000000100000-0x00000000dfffdfff] usable BIOS-e820: [mem 0x00000000dfffe000-0x00000000dfffffff] reserved BIOS-e820: [mem 0x00000000feffc000-0x00000000feffffff] reserved BIOS-e820: [mem 0x00000000fffc0000-0x00000000ffffffff] reserved BIOS-e820: [mem 0x0000000100000000-0x000000011fffffff] usable e820: update [mem 0x00000000-0x00000fff] usable ==> reserved e820: remove [mem 0x000a0000-0x000fffff] usable e820: last_pfn = 0x120000 max_arch_pfn = 0x400000000 e820: last_pfn = 0xdfffe max_arch_pfn = 0x400000000 ACPI: SRAT 00000000dffffc0e 00160 (v01 BOCHS BXPCSRAT 00000001 BXPC 00000001) SRAT: PXM 0 -> APIC 0x00 -> Node 0 SRAT: PXM 1 -> APIC 0x01 -> Node 1 SRAT: PXM 2 -> APIC 0x02 -> Node 2 SRAT: PXM 3 -> APIC 0x03 -> Node 3 SRAT: Node 0 PXM 0 [mem 0x00000000-0x0009ffff] SRAT: Node 0 PXM 0 [mem 0x00100000-0x3fffffff] SRAT: Node 1 PXM 1 [mem 0x40000000-0x7fffffff] SRAT: Node 2 PXM 2 [mem 0x80000000-0xbfffffff] SRAT: Node 3 PXM 3 [mem 0xc0000000-0xdfffffff] SRAT: Node 3 PXM 3 [mem 0x100000000-0x11fffffff] e820: [mem 0xe0000000-0xfeffbfff] available for PCI devices e820: reserve RAM buffer [mem 0x0009fc00-0x0009ffff] e820: reserve RAM buffer [mem 0xdfffe000-0xdfffffff] Eduardo Habkost (2): pc: Save size of RAM below 4GB acpi-build: Fix PCI hole handling on build_srat() hw/i386/acpi-build.c | 10 +++++----- hw/i386/pc.c | 1 + include/hw/i386/pc.h | 2 +- 3 files changed, 7 insertions(+), 6 deletions(-) -- 1.8.4.2