Il 19/11/2013 13:03, Peter Lieven ha scritto:
>>
>> Can you test which of these two work? But I agree it's best to disable
>> cache-leaf forwarding.
> The first does make windows boot again and it calculates a
> correct combination of cpus, threads, cores and sockets. But
> I think the reason it boots is because cores=threads=1.
>
> As its more intuitive (I think) I would prefer your "cores over threads
> over socket ".
> The last thing I would think of is emulating more than 1 socket. -smp N
> would then mean, N cores, no hyper-threading, 1 socket.
After looking more at the docs, I think I found the bug. Can you test this?
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 864c80e..16d4db1 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2086,14 +2086,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
/* cache info: needed for Core compatibility */
if (cpu->cache_info_passthrough) {
host_cpuid(index, count, eax, ebx, ecx, edx);
- break;
- }
- if (cs->nr_cores > 1) {
- *eax = (cs->nr_cores - 1) << 26;
+ *eax &= ~0xFC000000;
} else {
*eax = 0;
- }
- switch (count) {
+ switch (count) {
case 0: /* L1 dcache info */
*eax |= CPUID_4_TYPE_DCACHE | \
CPUID_4_LEVEL(1) | \
@@ -2118,9 +2114,6 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
*eax |= CPUID_4_TYPE_UNIFIED | \
CPUID_4_LEVEL(2) | \
CPUID_4_SELF_INIT_LEVEL;
- if (cs->nr_threads > 1) {
- *eax |= (cs->nr_threads - 1) << 14;
- }
*ebx = (L2_LINE_SIZE - 1) | \
((L2_PARTITIONS - 1) << 12) | \
((L2_ASSOCIATIVITY - 1) << 22);
@@ -2133,6 +2126,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
*ecx = 0;
*edx = 0;
break;
+ }
+ }
+
+ /* We give out APIC IDs ourselves, so force bits 31..26 even for "-cpu
host". */
+ if (cs->nr_cores > 1) {
+ *eax |= (cs->nr_cores - 1) << 26;
}
break;
case 5:
Paolo
