On Fri, Oct 18, 2013 at 7:05 AM, Peter Maydell <peter.mayd...@linaro.org> wrote:
> On 17 October 2013 11:38, Peter Maydell <peter.mayd...@linaro.org> wrote:
>> On 10 July 2013 05:23, <peter.crosthwa...@xilinx.com> wrote:
>>> From: Nathan Rossi <nathan.ro...@xilinx.com>
>>>
>>> Added Vector Base Address remapping on ARM v7.
>>
>> Apologies for this dropping off my radar for so long.
>> I've had a bit of a think and I think that you're right
>> that we can put in this register as part of our "random
>> things we provide even though we aren't strictly implementing
>> all of TZ", like the existing SCR register support.
>>
>>> +static int vbar_write(CPUARMState *env, const ARMCPRegInfo *ri,
>>> + uint64_t value)
>>> +{
>>> + value &= (1 << 31);
>>
>> This seems spurious -- we end up ignoring all but
>> the high bit of the written value.
>>
>>> + env->cp15.c12_vbar = value & ~0x1Ful;
>>> + return 0;
>>> +}
>>> +
>>
>> Otherwise looks OK.
>
> Update: I've removed the spurious mask line noted above
> and added the edited patch to target-arm.next.
>
> thanks
> -- PMM
>
Hi Peter,
Glad to see this go in. Is your target-arm.next branch available
in a public repo?
I found one on git.linaro.org but that is out of date.
Thanks,
Roy
