On Tue, 2013-09-24 at 19:55 +0900, Peter Maydell wrote: > On 24 September 2013 19:44, Marcel Apfelbaum <marce...@redhat.com> wrote: > > We need to check all the bridges on each bus encountered > > for their address range; if it corresponds to the transaction address, > > we pass the bridge to the other bus(depending on transaction's direction). > > I haven't looked at all at the details, but you can probably rephrase > this kind of "check address against range and pass recursively > to other bridge" algorithm in terms of appropriate statically > constructed memory regions. Since "transaction aborted" is > definitely not a fast path, the only argument for doing it that way > would be if the code worked out more neatly -- maybe worth > thinking about whether it would do so? I didn't fully understand your comment, please let me explain:
A PCI Device issues a transaction to an unassigned address, which is in a range corresponding to a bridge on some "upper" (close to CPU) bus. The region that will "catch" this access is a background region "behind" the "target" memory region (bus_master_enable_region). At this point we know: 1. The PCI device that initiated the transaction 2. The transaction's address I was suggesting an algorithm to find the MA device in order to set MA Received Bit in its Status(Sec_Status) register. The algorithm was to traverse the PCI buses for finding the MA device using the transaction address. Marcel > > -- PMM
