On Wed, 4 Sep 2013 13:48:40 +0300
"Michael S. Tsirkin" <m...@redhat.com> wrote:
> Detect the 64 bit window programmed by firmware
> and configure properties accordingly.
>
> Signed-off-by: Michael S. Tsirkin <m...@redhat.com>
> ---
> hw/pci-host/q35.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
> index 3f1d447..5cb1e8a 100644
> --- a/hw/pci-host/q35.c
> +++ b/hw/pci-host/q35.c
> @@ -90,6 +90,9 @@ static void q35_host_get_pci_hole64_start(Object *obj,
> Visitor *v,
> Error **errp)
> {
> Q35PCIHost *s = Q35_HOST_DEVICE(obj);
> + PCIHostState *h = PCI_HOST_BRIDGE(obj);
> +
> + pci_bus_get_w64_range(h->bus, &s->mch.pci_info.w64);
Shouldn't be it done at the time when BIOS initializes BAR, to avoid
inconsistent state in between write and read.
Also missing remapping of existing 64-bit PCI hole alias to a new range.
>
> visit_type_uint64(v, &s->mch.pci_info.w64.begin, name, errp);
> }
> @@ -99,6 +102,9 @@ static void q35_host_get_pci_hole64_end(Object *obj,
> Visitor *v,
> Error **errp)
> {
> Q35PCIHost *s = Q35_HOST_DEVICE(obj);
> + PCIHostState *h = PCI_HOST_BRIDGE(obj);
> +
> + pci_bus_get_w64_range(h->bus, &s->mch.pci_info.w64);
ditto
>
> visit_type_uint64(v, &s->mch.pci_info.w64.end, name, errp);
> }
