Makefile.target includes rule.mak and unnested common-obj-y, then prefix
them with '../', this will ignore object specific QEMU_CFLAGS in subdir
Makefile.objs:
$(obj)/curl.o: QEMU_CFLAGS += $(CURL_CFLAGS)
Because $(obj) here is './block', instead of '../block'. This doesn't
hurt compiling because we basically build all .o from top Makefile,
before entering Makefile.target, but it will affact arriving per-object
libs support.
The starting point of $(obj) is fixed before including ./Makefile.objs,
to get consistency with nested Makefile rules in target rule and
variable definition.
Signed-off-by: Fam Zheng <f...@redhat.com>
---
Makefile.target | 3 ++-
rules.mak | 6 +++---
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/Makefile.target b/Makefile.target
index 9a49852..b35e7c1 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -144,12 +144,13 @@ endif # CONFIG_SOFTMMU
%/translate.o: QEMU_CFLAGS += $(TRANSLATE_OPT_CFLAGS)
nested-vars += obj-y
+obj := ..
# This resolves all nested paths, so it must come last
include $(SRC_PATH)/Makefile.objs
all-obj-y = $(obj-y)
-all-obj-y += $(addprefix ../, $(common-obj-y))
+all-obj-y += $(addprefix $(obj)/, $(common-obj-y))
ifndef CONFIG_HAIKU
LIBS+=-lm
diff --git a/rules.mak b/rules.mak
index 4499745..5758137 100644
--- a/rules.mak
+++ b/rules.mak
@@ -103,7 +103,6 @@ clean: clean-timestamp
# magic to descend into other directories
-obj := .
old-nested-dirs :=
define push-var
@@ -119,9 +118,10 @@ endef
define unnest-dir
$(foreach var,$(nested-vars),$(call push-var,$(var),$1/))
-$(eval obj := $(obj)/$1)
+$(eval old-obj := $(obj))
+$(eval obj := $(if $(obj),$(obj)/$1,$1))
$(eval include $(SRC_PATH)/$1/Makefile.objs)
-$(eval obj := $(patsubst %/$1,%,$(obj)))
+$(eval obj := $(old-obj))
$(foreach var,$(nested-vars),$(call pop-var,$(var),$1/))
endef
--
1.8.3.1
