On Mon, Sep 02, 2013 at 06:42:33PM +0300, Marcel Apfelbaum wrote: > On Mon, 2013-09-02 at 15:39 +0100, Peter Maydell wrote: > > On 2 September 2013 15:13, Marcel Apfelbaum <marce...@redhat.com> wrote: > > > Added a memory region that has negative priority and > > > extends over all the pci adddress space. This region will > > > "catch" all the accesses to the unassigned pci > > > addresses and it will be possible to emulate the > > > master abort scenario (When no device on the bus claims > > > the transaction). > > > > > > Signed-off-by: Marcel Apfelbaum <marce...@redhat.com> > > > --- > > > hw/pci-host/piix.c | 8 ++++++++ > > > hw/pci-host/q35.c | 19 ++++++++++++++++--- > > > include/hw/pci-host/q35.h | 1 + > > > > This is happening at the wrong layer -- you want this memory > > region to be created and managed in the PCI core code so that > > we get correct PCI-spec behaviour for all our PCI controllers, > > not just the two x86 ones you've changed here.pci_address_space > I saw that the memory regions are part of the Host state and > duplicated for each host type(like pci_address_space). > Question, why are not pci_address_space and pci_hole present > in a core layer?
I think we can move them out to core. > > I followed the existing code; from what you are saying > I understand that also the existing memory regions > like the one mentioned above should be moved in > the core layer, right? > Marcel pci hole is a PC thing. > > > > -- PMM > > >
