s390 provides several CPU resets:
- CPU reset, clears interrupts, stop processing, clears TLB, but does
not touch registers
- initial CPU reset, like CPU reset, but also clears PSW, prefix, FPC,
timer and control registers. It does not touch gprs, fprs and acrs (!)
- Power on reset: the full monty
wire up CPUClass reset to the full monty, but provide the lesser resets
as part of S390CPUClass.
Signed-off-by: Christian Borntraeger <borntrae...@de.ibm.com>
---
target-s390x/cpu-qom.h | 4 ++++
target-s390x/cpu.c | 41 +++++++++++++++++++++++++++++++++--------
2 files changed, 37 insertions(+), 8 deletions(-)
diff --git a/target-s390x/cpu-qom.h b/target-s390x/cpu-qom.h
index 2dc1750..ac0460e 100644
--- a/target-s390x/cpu-qom.h
+++ b/target-s390x/cpu-qom.h
@@ -37,6 +37,8 @@
* @parent_realize: The parent class' realize handler.
* @parent_reset: The parent class' reset handler.
* @load_normal: Performs a load normal.
+ * @cpu_reset: Performs a CPU reset.
+ * @initial_cpu_reset: Performs an initial CPU reset.
*
* An S/390 CPU model.
*/
@@ -48,6 +50,8 @@ typedef struct S390CPUClass {
DeviceRealize parent_realize;
void (*parent_reset)(CPUState *cpu);
void (*load_normal)(CPUState *cpu);
+ void (*cpu_reset)(CPUState *cpu);
+ void (*initial_cpu_reset)(CPUState *cpu);
} S390CPUClass;
/**
diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c
index 69f5e10..b0af043 100644
--- a/target-s390x/cpu.c
+++ b/target-s390x/cpu.c
@@ -76,7 +76,7 @@ static void s390_cpu_load_normal(CPUState *s)
}
#endif
-/* CPUClass::reset() */
+/* S390CPUClass::cpu_reset() */
static void s390_cpu_reset(CPUState *s)
{
S390CPU *cpu = S390_CPU(s);
@@ -87,11 +87,6 @@ static void s390_cpu_reset(CPUState *s)
scc->parent_reset(s);
- memset(env, 0, offsetof(CPUS390XState, breakpoints));
-
- /* architectured initial values for CR 0 and 14 */
- env->cregs[0] = CR0_RESET;
- env->cregs[14] = CR14_RESET;
/* set halted to 1 to make sure we can add the cpu in
* s390_ipl_cpu code, where CPUState::halted is set back to 0
* after incrementing the cpu counter */
@@ -110,6 +105,35 @@ static void s390_cpu_machine_reset_cb(void *opaque)
}
#endif
+/* S390CPUClass::initial_reset() */
+static void s390_cpu_initial_reset(CPUState *s)
+{
+ S390CPU *cpu = S390_CPU(s);
+ CPUS390XState *env = &cpu->env;
+
+ s390_cpu_reset(s);
+ /* initial reset does not touch regs,fregs and aregs */
+ memset(&env->fpc, 0, offsetof(CPUS390XState, breakpoints) -
+ offsetof(CPUS390XState, fpc));
+
+ /* architectured initial values for CR 0 and 14 */
+ env->cregs[0] = CR0_RESET;
+ env->cregs[14] = CR14_RESET;
+}
+
+/* CPUClass:reset() */
+static void s390_cpu_full_reset(CPUState *s)
+{
+ S390CPU *cpu = S390_CPU(s);
+ CPUS390XState *env = &cpu->env;
+
+ s390_cpu_initial_reset(s);
+ /* also reset regs,aregs and fregs */
+ memset(env, 0, offsetof(CPUS390XState, fpc));
+}
+
+
+
static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
@@ -183,8 +207,9 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
#if !defined(CONFIG_USER_ONLY)
scc->load_normal = s390_cpu_load_normal;
#endif
- cc->reset = s390_cpu_reset;
-
+ scc->cpu_reset = s390_cpu_reset;
+ scc->initial_cpu_reset = s390_cpu_initial_reset;
+ cc->reset = s390_cpu_full_reset;
cc->do_interrupt = s390_cpu_do_interrupt;
cc->dump_state = s390_cpu_dump_state;
cc->set_pc = s390_cpu_set_pc;
--
1.8.3.1
