On Thu, Aug 22, 2013 at 09:58:33AM -0700, Richard Henderson wrote: > Signed-off-by: Richard Henderson <r...@twiddle.net> > --- > tcg/aarch64/tcg-target.h | 3 +-- > tcg/arm/tcg-target.h | 9 ++++----- > tcg/hppa/tcg-target.h | 3 +-- > tcg/i386/tcg-target.h | 3 +-- > tcg/ia64/tcg-target.h | 3 +-- > tcg/mips/tcg-target.h | 3 +-- > tcg/s390/tcg-target.h | 3 +-- > tcg/sparc/tcg-target.h | 12 ++++-------- > tcg/tcg.c | 6 ++---- > tcg/tci/tcg-target.h | 3 +-- > 10 files changed, 17 insertions(+), 31 deletions(-) > > diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h > index 51e5092..71f89ed 100644 > --- a/tcg/aarch64/tcg-target.h > +++ b/tcg/aarch64/tcg-target.h > @@ -92,8 +92,7 @@ enum { > TCG_AREG0 = TCG_REG_X19, > }; > > -static inline void flush_icache_range(tcg_target_ulong start, > - tcg_target_ulong stop) > +static inline void flush_icache_range(uintptr_t start, uintptr_t stop) > { > __builtin___clear_cache((char *)start, (char *)stop); > } > diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h > index 5cd9d6a..5637ffe 100644 > --- a/tcg/arm/tcg-target.h > +++ b/tcg/arm/tcg-target.h > @@ -90,15 +90,14 @@ enum { > TCG_AREG0 = TCG_REG_R6, > }; > > -static inline void flush_icache_range(tcg_target_ulong start, > - tcg_target_ulong stop) > +static inline void flush_icache_range(uintptr_t start, uintptr_t stop) > { > #if QEMU_GNUC_PREREQ(4, 1) > __builtin___clear_cache((char *) start, (char *) stop); > #else > - register unsigned long _beg __asm ("a1") = start; > - register unsigned long _end __asm ("a2") = stop; > - register unsigned long _flg __asm ("a3") = 0; > + register uintptr_t _beg __asm("a1") = start; > + register uintptr_t _end __asm("a2") = stop; > + register uintptr_t _flg __asm("a3") = 0; > __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" > (_flg)); > #endif > } > diff --git a/tcg/hppa/tcg-target.h b/tcg/hppa/tcg-target.h > index 25467bd..a9257a5 100644 > --- a/tcg/hppa/tcg-target.h > +++ b/tcg/hppa/tcg-target.h > @@ -109,8 +109,7 @@ typedef enum { > #define TCG_AREG0 TCG_REG_R17 > > > -static inline void flush_icache_range(tcg_target_ulong start, > - tcg_target_ulong stop) > +static inline void flush_icache_range(uintptr_t start, uintptr_t stop) > { > start &= ~31; > while (start <= stop) { > diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h > index e3f6bb9..963e839 100644 > --- a/tcg/i386/tcg-target.h > +++ b/tcg/i386/tcg-target.h > @@ -135,8 +135,7 @@ typedef enum { > # define TCG_AREG0 TCG_REG_EBP > #endif > > -static inline void flush_icache_range(tcg_target_ulong start, > - tcg_target_ulong stop) > +static inline void flush_icache_range(uintptr_t start, uintptr_t stop) > { > } > > diff --git a/tcg/ia64/tcg-target.h b/tcg/ia64/tcg-target.h > index f32d519..428dc40 100644 > --- a/tcg/ia64/tcg-target.h > +++ b/tcg/ia64/tcg-target.h > @@ -158,8 +158,7 @@ typedef enum { > > #define TCG_AREG0 TCG_REG_R7 > > -static inline void flush_icache_range(tcg_target_ulong start, > - tcg_target_ulong stop) > +static inline void flush_icache_range(uintptr_t start, uintptr_t stop) > { > start = start & ~(32UL - 1UL); > stop = (stop + (32UL - 1UL)) & ~(32UL - 1UL); > diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h > index a438950..433bad0 100644 > --- a/tcg/mips/tcg-target.h > +++ b/tcg/mips/tcg-target.h > @@ -125,8 +125,7 @@ typedef enum { > #include <sys/cachectl.h> > #endif > > -static inline void flush_icache_range(tcg_target_ulong start, > - tcg_target_ulong stop) > +static inline void flush_icache_range(uintptr_t start, uintptr_t stop) > { > cacheflush ((void *)start, stop-start, ICACHE); > } > diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h > index 42ca36c..60ffd7b 100644 > --- a/tcg/s390/tcg-target.h > +++ b/tcg/s390/tcg-target.h > @@ -110,8 +110,7 @@ enum { > TCG_AREG0 = TCG_REG_R10, > }; > > -static inline void flush_icache_range(tcg_target_ulong start, > - tcg_target_ulong stop) > +static inline void flush_icache_range(uintptr_t start, uintptr_t stop) > { > } > > diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h > index dab52d7..d1ca2d6 100644 > --- a/tcg/sparc/tcg-target.h > +++ b/tcg/sparc/tcg-target.h > @@ -138,16 +138,12 @@ typedef enum { > > #define TCG_AREG0 TCG_REG_I0 > > -static inline void flush_icache_range(tcg_target_ulong start, > - tcg_target_ulong stop) > +static inline void flush_icache_range(uintptr_t start, uintptr_t stop) > { > - unsigned long p; > - > - p = start & ~(8UL - 1UL); > - stop = (stop + (8UL - 1UL)) & ~(8UL - 1UL); > - > - for (; p < stop; p += 8) > + uintptr_t p; > + for (p = start & -8; p < (stop + 7) & -8; p += 8) { > __asm__ __volatile__("flush\t%0" : : "r" (p)); > + } > } > > #endif > diff --git a/tcg/tcg.c b/tcg/tcg.c > index dac8224..a0d0e9e 100644 > --- a/tcg/tcg.c > +++ b/tcg/tcg.c > @@ -284,8 +284,7 @@ void tcg_prologue_init(TCGContext *s) > s->code_buf = s->code_gen_prologue; > s->code_ptr = s->code_buf; > tcg_target_qemu_prologue(s); > - flush_icache_range((tcg_target_ulong)s->code_buf, > - (tcg_target_ulong)s->code_ptr); > + flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr); > > #ifdef DEBUG_DISAS > if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { > @@ -2382,8 +2381,7 @@ int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf) > tcg_gen_code_common(s, gen_code_buf, -1); > > /* flush instruction cache */ > - flush_icache_range((tcg_target_ulong)gen_code_buf, > - (tcg_target_ulong)s->code_ptr); > + flush_icache_range((uintptr_t)gen_code_buf, (uintptr_t)s->code_ptr); > > return s->code_ptr - gen_code_buf; > } > diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h > index d7fc14e..c80a34f 100644 > --- a/tcg/tci/tcg-target.h > +++ b/tcg/tci/tcg-target.h > @@ -169,8 +169,7 @@ void tci_disas(uint8_t opc); > tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr); > #define tcg_qemu_tb_exec tcg_qemu_tb_exec > > -static inline void flush_icache_range(tcg_target_ulong start, > - tcg_target_ulong stop) > +static inline void flush_icache_range(uintptr_t start, uintptr_t stop) > { > } >
Reviewed-by: Aurelien Jarno <aurel...@aurel32.net> -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurel...@aurel32.net http://www.aurel32.net