On Sat, Aug 17, 2013 at 04:26:44PM -0700, Richard Henderson wrote:
> With the optimization in tcg_liveness_analysis,
> we can avoid the MFLO when it is unused.
>
> Signed-off-by: Richard Henderson <r...@twiddle.net>
> ---
> tcg/mips/tcg-target.c | 10 ++++++++++
> tcg/mips/tcg-target.h | 4 ++--
> 2 files changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
> index 793532e..31cd514 100644
> --- a/tcg/mips/tcg-target.c
> +++ b/tcg/mips/tcg-target.c
> @@ -1423,6 +1423,14 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
> opc,
> tcg_out_opc_reg(s, OPC_MFLO, args[0], 0, 0);
> tcg_out_opc_reg(s, OPC_MFHI, args[1], 0, 0);
> break;
> + case INDEX_op_mulsh_i32:
> + tcg_out_opc_reg(s, OPC_MULT, 0, args[1], args[2]);
> + tcg_out_opc_reg(s, OPC_MFHI, args[0], 0, 0);
> + break;
> + case INDEX_op_muluh_i32:
> + tcg_out_opc_reg(s, OPC_MULTU, 0, args[1], args[2]);
> + tcg_out_opc_reg(s, OPC_MFHI, args[0], 0, 0);
> + break;
> case INDEX_op_div_i32:
> tcg_out_opc_reg(s, OPC_DIV, 0, args[1], args[2]);
> tcg_out_opc_reg(s, OPC_MFLO, args[0], 0, 0);
> @@ -1602,6 +1610,8 @@ static const TCGTargetOpDef mips_op_defs[] = {
> { INDEX_op_mul_i32, { "r", "rZ", "rZ" } },
> { INDEX_op_muls2_i32, { "r", "r", "rZ", "rZ" } },
> { INDEX_op_mulu2_i32, { "r", "r", "rZ", "rZ" } },
> + { INDEX_op_mulsh_i32, { "r", "rZ", "rZ" } },
> + { INDEX_op_muluh_i32, { "r", "rZ", "rZ" } },
> { INDEX_op_div_i32, { "r", "rZ", "rZ" } },
> { INDEX_op_divu_i32, { "r", "rZ", "rZ" } },
> { INDEX_op_rem_i32, { "r", "rZ", "rZ" } },
> diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
> index 6cb7c2f..7ef79e0 100644
> --- a/tcg/mips/tcg-target.h
> +++ b/tcg/mips/tcg-target.h
> @@ -89,8 +89,8 @@ typedef enum {
> #define TCG_TARGET_HAS_eqv_i32 0
> #define TCG_TARGET_HAS_nand_i32 0
> #define TCG_TARGET_HAS_muls2_i32 1
> -#define TCG_TARGET_HAS_muluh_i32 0
> -#define TCG_TARGET_HAS_mulsh_i32 0
> +#define TCG_TARGET_HAS_muluh_i32 1
> +#define TCG_TARGET_HAS_mulsh_i32 1
>
> /* optional instructions only implemented on MIPS4, MIPS32 and Loongson 2 */
> #if (defined(__mips_isa_rev) && (__mips_isa_rev >= 1)) || \
Reviewed-by: Aurelien Jarno <aurel...@aurel32.net>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurel...@aurel32.net http://www.aurel32.net
