From: Paolo Bonzini <pbonz...@redhat.com>
This makes it possible to start following RCU rules, which require
not dereferencing as->dispatch more than once. It is not covering
the whole of TCG, since the TLB data structures are not RCU-friendly,
but it is enough for exec.c.
Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Reviewed-by: Mike Day <ncm...@ncultra.org>
---
cputlb.c | 7 ++++---
exec.c | 9 +++++----
include/exec/cputlb.h | 9 ++++++---
3 files changed, 15 insertions(+), 10 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index 977c0ca..1f74d08 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -255,6 +255,7 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr,
hwaddr paddr, int prot,
int mmu_idx, target_ulong size)
{
+ AddressSpaceDispatch *d;
MemoryRegionSection *section;
unsigned int index;
target_ulong address;
@@ -269,8 +270,8 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr,
}
sz = size;
- section = address_space_translate_for_iotlb(&address_space_memory, paddr,
- &xlat, &sz);
+ d = address_space_memory.dispatch;
+ section = address_space_translate_for_iotlb(d, paddr, &xlat, &sz);
assert(sz >= TARGET_PAGE_SIZE);
#if defined(DEBUG_TLB)
@@ -290,7 +291,7 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr,
}
code_address = address;
- iotlb = memory_region_section_get_iotlb(env, section, vaddr, paddr, xlat,
+ iotlb = memory_region_section_get_iotlb(d, env, section, vaddr, paddr,
xlat,
prot, &address);
index = (vaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
diff --git a/exec.c b/exec.c
index 52e7fd5..c194bad 100644
--- a/exec.c
+++ b/exec.c
@@ -301,11 +301,11 @@ MemoryRegion *address_space_translate(AddressSpace *as,
hwaddr addr,
}
MemoryRegionSection *
-address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat,
+address_space_translate_for_iotlb(AddressSpaceDispatch *d, hwaddr addr, hwaddr
*xlat,
hwaddr *plen)
{
MemoryRegionSection *section;
- section = address_space_translate_internal(as->dispatch, addr, xlat, plen,
false);
+ section = address_space_translate_internal(d, addr, xlat, plen, false);
assert(!section->mr->iommu_ops);
return section;
@@ -719,7 +719,8 @@ static int cpu_physical_memory_set_dirty_tracking(int
enable)
return ret;
}
-hwaddr memory_region_section_get_iotlb(CPUArchState *env,
+hwaddr memory_region_section_get_iotlb(AddressSpaceDispatch *d,
+ CPUArchState *env,
MemoryRegionSection *section,
target_ulong vaddr,
hwaddr paddr, hwaddr xlat,
@@ -739,7 +740,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env,
iotlb |= PHYS_SECTION_ROM;
}
} else {
- iotlb = section - address_space_memory.dispatch->sections;
+ iotlb = section - d->sections;
iotlb += xlat;
}
diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h
index e21cb60..bd7ff2f 100644
--- a/include/exec/cputlb.h
+++ b/include/exec/cputlb.h
@@ -19,6 +19,8 @@
#ifndef CPUTLB_H
#define CPUTLB_H
+#include <exec/memory-internal.h>
+
#if !defined(CONFIG_USER_ONLY)
/* cputlb.c */
void tlb_protect_code(ram_addr_t ram_addr);
@@ -34,9 +36,10 @@ extern int tlb_flush_count;
void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr);
MemoryRegionSection *
-address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat,
- hwaddr *plen);
-hwaddr memory_region_section_get_iotlb(CPUArchState *env,
+address_space_translate_for_iotlb(AddressSpaceDispatch *d, hwaddr addr,
+ hwaddr *xlat, hwaddr *plen);
+hwaddr memory_region_section_get_iotlb(AddressSpaceDispatch *d,
+ CPUArchState *env,
MemoryRegionSection *section,
target_ulong vaddr,
hwaddr paddr, hwaddr xlat,
--
1.8.3.1
