Loading an qemu pointer as an immediate happens often:
- exit_tb $0x7fa8140013
+ exit_tb $0x7f81ee0013
...
- : d2800260 mov x0, #0x13
- : f2b50280 movk x0, #0xa814, lsl #16
- : f2c00fe0 movk x0, #0x7f, lsl #32
+ : 90ff1000 adrp x0, 0x7f81ee0000
+ : 91004c00 add x0, x0, #0x13
Signed-off-by: Richard Henderson <r...@twiddle.net>
---
tcg/aarch64/tcg-target.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c
index 3ea5db7..a03da58 100644
--- a/tcg/aarch64/tcg-target.c
+++ b/tcg/aarch64/tcg-target.c
@@ -298,6 +298,10 @@ typedef enum {
INSN_RET = 0xd65f0000,
INSN_B_C = 0x54000000,
+ /* PC relative addressing instructions */
+ INSN_ADR = 0x10000000,
+ INSN_ADRP = 0x90000000,
+
/* System instructions */
INSN_NOP = 0xd503201f,
} AArch64Insn;
@@ -554,6 +558,20 @@ static void tcg_out_movi(TCGContext *s, TCGType type,
TCGReg rd,
return;
}
+ /* Look for host pointer values within 4G of the PC. This happens
+ often when loading pointers to QEMU's data structures. */
+ valid = (value >> 12) - ((intptr_t)s->code_ptr >> 12);
+ if (valid == sextract64(valid, 0, 21)) {
+ insn = INSN_ADRP | rd;
+ insn |= (valid & 3) << 29;
+ insn |= (valid & 0x1ffffc) << (5 - 2);
+ tcg_out32(s, insn);
+ if (value & 0xfff) {
+ tcg_out_aimm(s, INSN_ADDI, ext, rd, rd, value & 0xfff);
+ }
+ return;
+ }
+
/* Would it take fewer insns to load the inverse? */
wantinv = 0;
for (i = 0; i < 64; i += 16) {
--
1.8.3.1
