This patch is based on Hu Tao's: http://lists.nongnu.org/archive/html/qemu-devel/2013-08/msg00124.html
No need to hard-code pvpanic as part of the machine. It can be added with "-device pvpanic" from command line (The next patch). Anyway, for backport compatibility it is still part of 1.5 machine. Signed-off-by: Marcel Apfelbaum <marce...@redhat.com> --- Changes from v1: - Keep pvpanic device enabled by default for 1.5 for backport compatibility hw/i386/pc_piix.c | 9 ++++----- hw/i386/pc_q35.c | 7 ++++--- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index ab25458..679d2e5 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -56,7 +56,7 @@ static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; -static bool has_pvpanic = true; +static bool has_pvpanic; static bool has_pci_info = true; /* PC hardware initialisation */ @@ -252,14 +252,15 @@ static void pc_init_pci(QEMUMachineInitArgs *args) static void pc_init_pci_1_5(QEMUMachineInitArgs *args) { has_pci_info = false; + has_pvpanic = true; pc_init_pci(args); } static void pc_init_pci_1_4(QEMUMachineInitArgs *args) { - has_pvpanic = false; x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE); - pc_init_pci_1_5(args); + has_pci_info = false; + pc_init_pci(args); } static void pc_init_pci_1_3(QEMUMachineInitArgs *args) @@ -290,7 +291,6 @@ static void pc_init_pci_no_kvmclock(QEMUMachineInitArgs *args) const char *kernel_cmdline = args->kernel_cmdline; const char *initrd_filename = args->initrd_filename; const char *boot_device = args->boot_device; - has_pvpanic = false; has_pci_info = false; disable_kvm_pv_eoi(); enable_compat_apic_id_mode(); @@ -309,7 +309,6 @@ static void pc_init_isa(QEMUMachineInitArgs *args) const char *kernel_cmdline = args->kernel_cmdline; const char *initrd_filename = args->initrd_filename; const char *boot_device = args->boot_device; - has_pvpanic = false; has_pci_info = false; if (cpu_model == NULL) cpu_model = "486"; diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 2f35d12..d2bb248 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -46,7 +46,7 @@ /* ICH9 AHCI has 6 ports */ #define MAX_SATA_PORTS 6 -static bool has_pvpanic = true; +static bool has_pvpanic; static bool has_pci_info = true; /* PC hardware initialisation */ @@ -220,14 +220,15 @@ static void pc_q35_init(QEMUMachineInitArgs *args) static void pc_q35_init_1_5(QEMUMachineInitArgs *args) { has_pci_info = false; + has_pvpanic = true; pc_q35_init(args); } static void pc_q35_init_1_4(QEMUMachineInitArgs *args) { - has_pvpanic = false; x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE); - pc_q35_init_1_5(args); + has_pci_info = false; + pc_q35_init(args); } static QEMUMachine pc_q35_machine_v1_6 = { -- 1.8.3.1