On 3 July 2013 22:29, Richard Henderson <r...@twiddle.net> wrote: > -#if defined(__ARM_ARCH_7__) || \ > - defined(__ARM_ARCH_7A__) || \ > - defined(__ARM_ARCH_7EM__) || \ > - defined(__ARM_ARCH_7M__) || \ > - defined(__ARM_ARCH_7R__) > -#define USE_ARMV7_INSTRUCTIONS > +/* The __ARM_ARCH define is provided by gcc 4.8. Construct it otherwise. */ > +#ifndef __ARM_ARCH > +# if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \ > + || defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \ > + || defined(__ARM_ARCH_7EM__) > +# define __ARM_ARCH 7 > +# elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \ > + || defined(__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__) \ > + || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__) > +# define __ARM_ARCH 6 > +# elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5E__) \ > + || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__) \ > + || defined(__ARM_ARCH_5TEJ__) > +# define __ARM_ARCH 5 > +# else > +# define __ARM_ARCH 4 > +# endif > #endif > > -#if defined(USE_ARMV7_INSTRUCTIONS) || \ > - defined(__ARM_ARCH_6J__) || \ > - defined(__ARM_ARCH_6K__) || \ > - defined(__ARM_ARCH_6T2__) || \ > - defined(__ARM_ARCH_6Z__) || \ > - defined(__ARM_ARCH_6ZK__) > -#define USE_ARMV6_INSTRUCTIONS > -#endif > - > -#if defined(USE_ARMV6_INSTRUCTIONS) || \ > - defined(__ARM_ARCH_5T__) || \ > - defined(__ARM_ARCH_5TE__) || \ > - defined(__ARM_ARCH_5TEJ__) > -#define USE_ARMV5_INSTRUCTIONS > -#endif
This change means we now set use_armv5_instructions for __ARCH_ARCH_5__ and __ARM_ARCH_5E__, which we didn't before. However one of the things that bool is gating is whether we use the 'blx' insn, which is ARMv5T and above only. So this will break v5-but-not-v5T CPUs. (use_armv6_instructions is similarly now set for __ARCH_ARCH_6__ where it was not before, but none of the things we guard with that test are insns that aren't in base v6.) thanks -- PMM
