Am 30.06.2013 03:26, schrieb Alexander Graf:
> On a real G3 Beige the secondary IDE bus lives on the mac-io chip, not
> on some random PCI device. Move it there to become more compatible.
>
> While at it, also clean up the IDE channel connection logic.
>
> Signed-off-by: Alexander Graf <ag...@suse.de>
>
> ---
>
> v1 -> v2:
>
> - fix IRQ mapping
> ---
> hw/ide/macio.c | 2 +-
> hw/misc/macio/macio.c | 95
> +++++++++++++++++++++++++++++----------------------
> hw/ppc/mac_oldworld.c | 17 +++++----
> 3 files changed, 64 insertions(+), 50 deletions(-)
>
> diff --git a/hw/ide/macio.c b/hw/ide/macio.c
> index a1952b0..7a1c573 100644
> --- a/hw/ide/macio.c
> +++ b/hw/ide/macio.c
> @@ -363,7 +363,7 @@ static void macio_ide_register_types(void)
> type_register_static(&macio_ide_type_info);
> }
>
> -/* hd_table must contain 4 block drivers */
> +/* hd_table must contain 2 block drivers */
> void macio_ide_init_drives(MACIOIDEState *s, DriveInfo **hd_table)
> {
> int i;
> diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c
> index fd4c8e5..d9971e2 100644
> --- a/hw/misc/macio/macio.c
> +++ b/hw/misc/macio/macio.c
> @@ -51,11 +51,9 @@ typedef struct OldWorldMacIOState {
> /*< private >*/
> MacIOState parent_obj;
> /*< public >*/
> -
> - qemu_irq irqs[3];
> -
> + qemu_irq irqs[5];
> MacIONVRAMState nvram;
> - MACIOIDEState ide;
> + MACIOIDEState ide[2];
> } OldWorldMacIOState;
I had asked you to please keep my spacing: It separates parent field,
local fields (IRQs) and child fields.
>
> #define NEWWORLD_MACIO(obj) \
> @@ -147,18 +145,32 @@ static int macio_common_initfn(PCIDevice *d)
> return 0;
> }
>
> +static int macio_initfn_ide(MacIOState *s, MACIOIDEState *ide, qemu_irq irq0,
> + qemu_irq irq1, int dmaid)
macio_realize_ide would be a better name since PCIDevices still use
their legacy "initfn".
Otherwise looks good.
Andreas
> +{
> + SysBusDevice *sysbus_dev;
> +
> + sysbus_dev = SYS_BUS_DEVICE(ide);
> + sysbus_connect_irq(sysbus_dev, 0, irq0);
> + sysbus_connect_irq(sysbus_dev, 1, irq1);
> + macio_ide_register_dma(ide, s->dbdma, dmaid);
> + return qdev_init(DEVICE(ide));
> +}
> +
> static int macio_oldworld_initfn(PCIDevice *d)
> {
> MacIOState *s = MACIO(d);
> OldWorldMacIOState *os = OLDWORLD_MACIO(d);
> SysBusDevice *sysbus_dev;
> + int i;
> + int cur_irq = 0;
> int ret = macio_common_initfn(d);
> if (ret < 0) {
> return ret;
> }
>
> sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
> - sysbus_connect_irq(sysbus_dev, 0, os->irqs[0]);
> + sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
>
> ret = qdev_init(DEVICE(&os->nvram));
> if (ret < 0) {
> @@ -174,23 +186,39 @@ static int macio_oldworld_initfn(PCIDevice *d)
> memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem);
> }
>
> - sysbus_dev = SYS_BUS_DEVICE(&os->ide);
> - sysbus_connect_irq(sysbus_dev, 0, os->irqs[1]);
> - sysbus_connect_irq(sysbus_dev, 1, os->irqs[2]);
> - macio_ide_register_dma(&os->ide, s->dbdma, 0x16);
> - ret = qdev_init(DEVICE(&os->ide));
> - if (ret < 0) {
> - return ret;
> + /* IDE buses */
> + for (i = 0; i < ARRAY_SIZE(os->ide); i++) {
> + qemu_irq irq0 = os->irqs[cur_irq++];
> + qemu_irq irq1 = os->irqs[cur_irq++];
> +
> + ret = macio_initfn_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4));
> + if (ret < 0) {
> + return ret;
> + }
> }
>
> return 0;
> }
>
> +static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, int index)
> +{
> + gchar *name;
> +
> + object_initialize(ide, TYPE_MACIO_IDE);
> + qdev_set_parent_bus(DEVICE(ide), sysbus_get_default());
> + memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
> + &ide->mem);
> + name = g_strdup_printf("ide[%i]", index);
> + object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL);
> + g_free(name);
> +}
> +
> static void macio_oldworld_init(Object *obj)
> {
> MacIOState *s = MACIO(obj);
> OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
> DeviceState *dev;
> + int i;
>
> qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs));
>
> @@ -199,10 +227,9 @@ static void macio_oldworld_init(Object *obj)
> qdev_prop_set_uint32(dev, "size", 0x2000);
> qdev_prop_set_uint32(dev, "it_shift", 4);
>
> - object_initialize(&os->ide, TYPE_MACIO_IDE);
> - qdev_set_parent_bus(DEVICE(&os->ide), sysbus_get_default());
> - memory_region_add_subregion(&s->bar, 0x1f000 + (1 * 0x1000),
> &os->ide.mem);
> - object_property_add_child(obj, "ide", OBJECT(&os->ide), NULL);
> + for (i = 0; i < 2; i++) {
> + macio_init_ide(s, &os->ide[i], i);
> + }
> }
>
> static int macio_newworld_initfn(PCIDevice *d)
> @@ -210,35 +237,30 @@ static int macio_newworld_initfn(PCIDevice *d)
> MacIOState *s = MACIO(d);
> NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
> SysBusDevice *sysbus_dev;
> + int i;
> + int cur_irq = 0;
> int ret = macio_common_initfn(d);
> if (ret < 0) {
> return ret;
> }
>
> sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
> - sysbus_connect_irq(sysbus_dev, 0, ns->irqs[0]);
> + sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
>
> if (s->pic_mem) {
> /* OpenPIC */
> memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
> }
>
> - sysbus_dev = SYS_BUS_DEVICE(&ns->ide[0]);
> - sysbus_connect_irq(sysbus_dev, 0, ns->irqs[1]);
> - sysbus_connect_irq(sysbus_dev, 1, ns->irqs[2]);
> - macio_ide_register_dma(&ns->ide[0], s->dbdma, 0x16);
> - ret = qdev_init(DEVICE(&ns->ide[0]));
> - if (ret < 0) {
> - return ret;
> - }
> + /* IDE buses */
> + for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
> + qemu_irq irq0 = ns->irqs[cur_irq++];
> + qemu_irq irq1 = ns->irqs[cur_irq++];
>
> - sysbus_dev = SYS_BUS_DEVICE(&ns->ide[1]);
> - sysbus_connect_irq(sysbus_dev, 0, ns->irqs[3]);
> - sysbus_connect_irq(sysbus_dev, 1, ns->irqs[4]);
> - macio_ide_register_dma(&ns->ide[1], s->dbdma, 0x1a);
> - ret = qdev_init(DEVICE(&ns->ide[1]));
> - if (ret < 0) {
> - return ret;
> + ret = macio_initfn_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4));
> + if (ret < 0) {
> + return ret;
> + }
> }
>
> return 0;
> @@ -249,18 +271,11 @@ static void macio_newworld_init(Object *obj)
> MacIOState *s = MACIO(obj);
> NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
> int i;
> - gchar *name;
>
> qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
>
> for (i = 0; i < 2; i++) {
> - object_initialize(&ns->ide[i], TYPE_MACIO_IDE);
> - qdev_set_parent_bus(DEVICE(&ns->ide[i]), sysbus_get_default());
> - memory_region_add_subregion(&s->bar, 0x1f000 + ((i + 1) * 0x1000),
> - &ns->ide[i].mem);
> - name = g_strdup_printf("ide[%i]", i);
> - object_property_add_child(obj, name, OBJECT(&ns->ide[i]), NULL);
> - g_free(name);
> + macio_init_ide(s, &ns->ide[i], i);
> }
> }
>
> diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
> index 2aab54c..7422eb9 100644
> --- a/hw/ppc/mac_oldworld.c
> +++ b/hw/ppc/mac_oldworld.c
> @@ -268,20 +268,19 @@ static void ppc_heathrow_init(QEMUMachineInitArgs *args)
> macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO);
> dev = DEVICE(macio);
> qdev_connect_gpio_out(dev, 0, pic[0x12]); /* CUDA */
> - qdev_connect_gpio_out(dev, 1, pic[0x0D]); /* IDE */
> - qdev_connect_gpio_out(dev, 2, pic[0x02]); /* IDE DMA */
> + qdev_connect_gpio_out(dev, 1, pic[0x0D]); /* IDE-0 */
> + qdev_connect_gpio_out(dev, 2, pic[0x02]); /* IDE-0 DMA */
> + qdev_connect_gpio_out(dev, 3, pic[0x0E]); /* IDE-1 */
> + qdev_connect_gpio_out(dev, 4, pic[0x03]); /* IDE-1 DMA */
> macio_init(macio, pic_mem, escc_bar);
>
> - /* First IDE channel is a MAC IDE on the MacIO bus */
> macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
> - "ide"));
> + "ide[0]"));
> macio_ide_init_drives(macio_ide, hd);
>
> - /* Second IDE channel is a CMD646 on the PCI bus */
> - hd[0] = hd[MAX_IDE_DEVS];
> - hd[1] = hd[MAX_IDE_DEVS + 1];
> - hd[3] = hd[2] = NULL;
> - pci_cmd646_ide_init(pci_bus, hd, 0);
> + macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
> + "ide[1]"));
> + macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
>
> dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
> adb_bus = qdev_get_child_bus(dev, "adb.0");
>
--
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