Hi Peter, (Sorry about the delay),
On Wed, Feb 27, 2013 at 8:10 PM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 27 February 2013 07:16, Peter Crosthwaite > <peter.crosthwa...@xilinx.com> wrote: >> From: Nathan Rossi <nathan.ro...@xilinx.com> >> >> Added Vector Base Address remapping on ARM v7. > > This one's tricky because the VBAR only exists in CPUs with > TrustZone, and strictly speaking QEMU models a non-TrustZone > core. However we already have some dummy cp15 registers which > are really TZ-only just to get guests working, and this may > well fall into that category. > > I need to have a think about how we can coherently define > what QEMU does about TZ so we can have a better idea of > what should and shouldn't be implemented. (If you have any > suggestions I'm open to them.) > ARM_FEATURE_TZ? > On the patch itself: > * you've forgotten to bump the cpu vmstate version > * I'm trying to move towards using the official register > abbreviations in cpu struct member names > * the low bits of VBAR are "UNK/SBZP", which means our > implementation must ignore writes and read as zeroes. So > you need to do the masking in the write-accessor, not at > point of use Fixed. > * we can just rely on the fact that the vbar field will be > zero when QEMU is emulating a pre-v7 core, so you can > avoid the feature check on use > Fixed. Regards, Peter > thanks > -- PMM >
