On 7 June 2013 05:02, <peter.crosthwa...@xilinx.com> wrote:
> From: Peter Crosthwaite <peter.crosthwa...@xilinx.com>
>
> commit 1db8b5efe0c2b5000e50691eea61264a615f43de introduced an issue
> where QEMU would segfault if you have an unattached Cadence UART.
>
> Fix by guarding the flush-on-reset logic on there being a qemu_chr
> attachment.
>
> Reported-by: Soren Brinkmann <soren.brinkm...@xilinx.com>
> Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com>
> ---
>
> hw/char/cadence_uart.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
> index c2a7834..29827d2 100644
> --- a/hw/char/cadence_uart.c
> +++ b/hw/char/cadence_uart.c
> @@ -157,7 +157,9 @@ static void uart_rx_reset(UartState *s)
> {
> s->rx_wpos = 0;
> s->rx_count = 0;
> - qemu_chr_accept_input(s->chr);
> + if (s->chr) {
> + qemu_chr_accept_input(s->chr);
> + }
There seem to be a lot of references to s->chr in this device:
is this really the only one which needs a guard against NULL?
thanks
-- PMM
