From: Peter Crosthwaite <peter.crosthwa...@xilinx.com>
Nand chips are not sysbus devices - they do not have any sense of MMIO,
nor interrupts. Re-parent to TYPE_DEVICE accordingly.
Cc: afaer...@suse.de
Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com>
---
hw/block/nand.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/block/nand.c b/hw/block/nand.c
index 8dca3bc..072de7c 100644
--- a/hw/block/nand.c
+++ b/hw/block/nand.c
@@ -21,7 +21,7 @@
# include "hw/hw.h"
# include "hw/block/flash.h"
# include "sysemu/blockdev.h"
-# include "hw/sysbus.h"
+#include "hw/qdev.h"
#include "qemu/error-report.h"
# define NAND_CMD_READ0 0x00
@@ -54,7 +54,8 @@
typedef struct NANDFlashState NANDFlashState;
struct NANDFlashState {
- SysBusDevice busdev;
+ DeviceState parent_obj;
+
uint8_t manf_id, chip_id;
uint8_t buswidth; /* in BYTES */
int size, pages;
@@ -440,7 +441,7 @@ static void nand_class_init(ObjectClass *klass, void *data)
static const TypeInfo nand_info = {
.name = TYPE_NAND,
- .parent = TYPE_SYS_BUS_DEVICE,
+ .parent = TYPE_DEVICE,
.instance_size = sizeof(NANDFlashState),
.class_init = nand_class_init,
};
--
1.8.3.rc1.44.gb387c77.dirty
