This series is a split of: "[PATCH 0/4] ARM aarch64 TCG tlb fast lookup" http://lists.nongnu.org/archive/html/qemu-devel/2013-05/msg04803.html
It implements the low level operations that are necessary in order to implement the tlb fast lookup, which will be a separate series. It requires the reviewed but not committed yet series "[PATCH v4 0/3] ARM aarch64 TCG target" at: http://lists.nongnu.org/archive/html/qemu-devel/2013-05/msg04200.html Tested running on a x86-64 physical machine running Foundation v8, running a linux 3.8.0-rc6+ minimal host system based on linaro v8 image 201301271620 for user space. Tested guests: arm v5, i386 FreeDOS, i386 linux, sparc images, all from the qemu testing page. Also tested on x86-64/linux built with buildroot. Changes from the original series: * added ADDS and ANDS to the shifted regs ops, reorder * split shifted regs ops and test/and immediate into 2 patches * for byte swapping, remove REV32, we can just use REV * fix broken comment in tcg_out_uxt Claudio Fontana (4): tcg/aarch64: improve arith shifted regs operations tcg/aarch64: implement AND/TEST immediate pattern tcg/aarch64: implement byte swap operations tcg/aarch64: implement sign/zero extend operations tcg/aarch64/tcg-target.c | 170 +++++++++++++++++++++++++++++++++++++++++------ tcg/aarch64/tcg-target.h | 30 ++++----- 2 files changed, 166 insertions(+), 34 deletions(-) -- 1.8.1
