On 2013-05-08 08:26, Alexander Graf wrote:
However, the situation is more complex than that. On 32bit CPUs, L=1 instructions are either treated identical to L=0 instructions (G4) or treated as illegal instructions (e500mc). Differenciating these cases is out of scope for the 1.5 release and will follow afterwards. For now just treat the 32bit CPU, 64bit cmp case as undefined.
Ah ha. Interesting g4/e500 difference. Reviewed-by: Richard Henderson <r...@twiddle.net> r~
