On 08.05.2013, at 11:32, Alexander Graf wrote: > > On 08.05.2013, at 11:20, Torbjorn Granlund wrote: > >> Aurelien Jarno <aurel...@aurel32.net> writes: >> >> 64-bit CPUs check for the L bit of comparison instruction to determine >> if the instruction is 32-bit wide, and not to the MSR SF bit. >> >> L=1 on a 32-bit CPU should generate an invalid instruction exception. >> >> No. See my previous post. >> >> The L bit is to be ignored for 32-bit CPUs, just like the original code >> did. > > I see. So if the target is 64bit capable, then we distinguish by the > instruction bit, but for 32bit targets we always call the 32bit variant > regardless of the bit?
Ok, so the real problem here is that NARROW_MODE is not set, but is used to differentiate whether to use the 32bit cmp only or not. Richard, there are 2 ways out of this: 1) get rid of NARROW_MODE and always check ctx->sf 2) add a new 32bit only insns flag and create separate functions for 32bit cmp calls I have a patch set ready for 2, but I think 1 would be the better alternative. The only cases I could spot where things could break is in the add/sub corner case. Let me try to cook up something. Alex
