Typedef xilinx_axidma's object state struct to shorten the repeated usages of struct XilinxAXIDMA.
Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com> Acked-by: Edgar E. Iglesias <edgar.igles...@xilinx.com> --- hw/xilinx_axidma.c | 16 +++++++++------- 1 files changed, 9 insertions(+), 7 deletions(-) diff --git a/hw/xilinx_axidma.c b/hw/xilinx_axidma.c index 5d2b33a..d57538e 100644 --- a/hw/xilinx_axidma.c +++ b/hw/xilinx_axidma.c @@ -39,6 +39,8 @@ #define R_TAILDESC (0x10 / 4) #define R_MAX (0x30 / 4) +typedef struct XilinxAXIDMA XilinxAXIDMA; + enum { DMACR_RUNSTOP = 1, DMACR_TAILPTR_MODE = 2, @@ -354,7 +356,7 @@ static void stream_process_s2mem(struct Stream *s, static void axidma_push(StreamSlave *obj, unsigned char *buf, size_t len, uint32_t *app) { - struct XilinxAXIDMA *d = FROM_SYSBUS(typeof(*d), SYS_BUS_DEVICE(obj)); + XilinxAXIDMA *d = FROM_SYSBUS(typeof(*d), SYS_BUS_DEVICE(obj)); struct Stream *s = &d->streams[1]; if (!app) { @@ -367,7 +369,7 @@ axidma_push(StreamSlave *obj, unsigned char *buf, size_t len, uint32_t *app) static uint64_t axidma_read(void *opaque, hwaddr addr, unsigned size) { - struct XilinxAXIDMA *d = opaque; + XilinxAXIDMA *d = opaque; struct Stream *s; uint32_t r = 0; int sid; @@ -402,7 +404,7 @@ static uint64_t axidma_read(void *opaque, hwaddr addr, static void axidma_write(void *opaque, hwaddr addr, uint64_t value, unsigned size) { - struct XilinxAXIDMA *d = opaque; + XilinxAXIDMA *d = opaque; struct Stream *s; int sid; @@ -460,7 +462,7 @@ static const MemoryRegionOps axidma_ops = { static int xilinx_axidma_init(SysBusDevice *dev) { - struct XilinxAXIDMA *s = FROM_SYSBUS(typeof(*s), dev); + XilinxAXIDMA *s = FROM_SYSBUS(typeof(*s), dev); int i; sysbus_init_irq(dev, &s->streams[0].irq); @@ -482,14 +484,14 @@ static int xilinx_axidma_init(SysBusDevice *dev) static void xilinx_axidma_initfn(Object *obj) { - struct XilinxAXIDMA *s = FROM_SYSBUS(typeof(*s), SYS_BUS_DEVICE(obj)); + XilinxAXIDMA *s = FROM_SYSBUS(typeof(*s), SYS_BUS_DEVICE(obj)); object_property_add_link(obj, "axistream-connected", TYPE_STREAM_SLAVE, (Object **) &s->tx_dev, NULL); } static Property axidma_properties[] = { - DEFINE_PROP_UINT32("freqhz", struct XilinxAXIDMA, freqhz, 50000000), + DEFINE_PROP_UINT32("freqhz", XilinxAXIDMA, freqhz, 50000000), DEFINE_PROP_END_OF_LIST(), }; @@ -507,7 +509,7 @@ static void axidma_class_init(ObjectClass *klass, void *data) static const TypeInfo axidma_info = { .name = "xlnx.axi-dma", .parent = TYPE_SYS_BUS_DEVICE, - .instance_size = sizeof(struct XilinxAXIDMA), + .instance_size = sizeof(XilinxAXIDMA), .class_init = axidma_class_init, .instance_init = xilinx_axidma_initfn, .interfaces = (InterfaceInfo[]) { -- 1.7.0.4