On 28 March 2013 15:33, Richard Henderson <r...@twiddle.net> wrote:
> +static inline void tcg_out_nop(TCGContext *s)
> +{
> + if (use_armv7_instructions) {
> + /* Architected nop introduced in v6k. */
> + /* ??? This is an MSR (imm) 0,0,0 insn. Anyone know if this
> + also Just So Happened to do nothing on pre-v6k so that we
> + don't need to conditionalize it? */
Well, it corresponds to a "do nothing" kind of MSR (because
all the field_mask bits are zero) but I bet it's more expensive
than mov r0, r0 on at least some pre-v6k cores.
> + tcg_out32(s, 0xe320f000);
> + } else {
> + /* Prior to that the assembler uses mov r0, r0. Unlike the nop
> + above, this is guaranteed to consume execution resources. */
Guaranteed by who? Catching this case in the decoder and treating it
exactly like NOP is a perfectly legal implementation.
(For that matter there's nothing restricting an implementation of
the architectural NOP from tying up every execution resource on
the core for 500 cycles.)
> + tcg_out_dat_reg(s, COND_AL, ARITH_MOV, 0, 0, 0, SHIFT_IMM_LSL(0));
> + }
-- PMM
