When setting PCIe capabilities we need to know the type of bus we
have. On secondary buses we could poke around on the parent bridge
device to infer this data, but on root buses there's no parent device.
By creating a new PCIE TypeInfo we can inherit everything about PCI
buses while still allowing us to differentiate and potentially extend
in the future.
The first benefactor of this change is included here, mangling
Endpoints to Root Complex Integrated Endpoints, allowing nec-usb-xhci
to work on the root bus of q35 with Windows. I also plan to use this
to drop link capabilities, control, and status on all Integrated
Endpoints and for PCIe capability modifications on assigned devices.
Thanks,
Alex
---
Alex Williamson (7):
pci: Create and register a new PCI Express TypeInfo
pci: Move PCI and PCIE type defines
pci: Allow PCI bus creation interfaces to specify the type of bus
pci: Q35, Root Ports, and Switches create PCI Express buses
pci: Create pci_bus_is_express helper
pci: Create and use API to determine root buses
pcie: Mangle types to match topology
hw/alpha_typhoon.c | 2 +-
hw/apb_pci.c | 4 ++--
hw/bonito.c | 2 +-
hw/dec_pci.c | 7 ++++++-
hw/grackle_pci.c | 2 +-
hw/gt64xxx.c | 2 +-
hw/i82801b11.c | 2 +-
hw/ioh3420.c | 2 +-
hw/pci/pci.c | 36 ++++++++++++++++++++++++++----------
hw/pci/pci.h | 13 ++++++++++---
hw/pci/pci_bridge.c | 5 ++---
hw/pci/pci_bridge.h | 2 +-
hw/pci/pci_bus.h | 3 ---
hw/pci/pcie.c | 13 +++++++++++++
hw/pci_bridge_dev.c | 2 +-
hw/piix_pci.c | 2 +-
hw/ppc4xx_pci.c | 2 +-
hw/ppce500_pci.c | 2 +-
hw/prep_pci.c | 2 +-
hw/q35.c | 3 ++-
hw/sh_pci.c | 2 +-
hw/spapr_pci.c | 2 +-
hw/unin_pci.c | 4 ++--
hw/versatile_pci.c | 2 +-
hw/xio3130_downstream.c | 2 +-
hw/xio3130_upstream.c | 2 +-
26 files changed, 80 insertions(+), 42 deletions(-)
