Just like root ports, I think these are supposed to be direct mapped. Signed-off-by: Alex Williamson <alex.william...@redhat.com> --- hw/xio3130_downstream.c | 7 +++++++ hw/xio3130_upstream.c | 7 +++++++ 2 files changed, 14 insertions(+)
diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c index 7f00bc8..c484770 100644 --- a/hw/xio3130_downstream.c +++ b/hw/xio3130_downstream.c @@ -54,6 +54,11 @@ static void xio3130_downstream_reset(DeviceState *qdev) pci_bridge_reset(qdev); } +static int xio3130_downstream_map_irq(PCIDevice *pci_dev, int irq_num) +{ + return irq_num; +} + static int xio3130_downstream_initfn(PCIDevice *d) { PCIBridge* br = DO_UPCAST(PCIBridge, dev, d); @@ -61,6 +66,8 @@ static int xio3130_downstream_initfn(PCIDevice *d) PCIESlot *s = DO_UPCAST(PCIESlot, port, p); int rc; + pci_bridge_map_irq(br, NULL, xio3130_downstream_map_irq); + rc = pci_bridge_initfn(d); if (rc < 0) { return rc; diff --git a/hw/xio3130_upstream.c b/hw/xio3130_upstream.c index 70b15d3..c233a43 100644 --- a/hw/xio3130_upstream.c +++ b/hw/xio3130_upstream.c @@ -51,12 +51,19 @@ static void xio3130_upstream_reset(DeviceState *qdev) pcie_cap_deverr_reset(d); } +static int xio3130_upstream_map_irq(PCIDevice *pci_dev, int irq_num) +{ + return irq_num; +} + static int xio3130_upstream_initfn(PCIDevice *d) { PCIBridge* br = DO_UPCAST(PCIBridge, dev, d); PCIEPort *p = DO_UPCAST(PCIEPort, br, br); int rc; + pci_bridge_map_irq(br, NULL, xio3130_upstream_map_irq); + rc = pci_bridge_initfn(d); if (rc < 0) { return rc;