This greatly improves the code we can produce for deposit
without armv7 support.
Signed-off-by: Richard Henderson <r...@twiddle.net>
---
tcg/arm/tcg-target.c | 38 +++++++++++++++++++++++++++++---------
tcg/arm/tcg-target.h | 2 --
2 files changed, 29 insertions(+), 11 deletions(-)
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index 3422bd7..6618571 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -145,6 +145,9 @@ static void patch_reloc(uint8_t *code_ptr, int type,
}
}
+#define TCG_CT_CONST_ARM 0x100
+#define TCG_CT_CONST_INV 0x200
+
/* parse target specific constraints */
static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
{
@@ -155,6 +158,9 @@ static int target_parse_constraint(TCGArgConstraint *ct,
const char **pct_str)
case 'I':
ct->ct |= TCG_CT_CONST_ARM;
break;
+ case 'K':
+ ct->ct |= TCG_CT_CONST_INV;
+ break;
case 'r':
ct->ct |= TCG_CT_REG;
@@ -275,16 +281,19 @@ static inline int check_fit_imm(uint32_t imm)
* add, sub, eor...: ditto
*/
static inline int tcg_target_const_match(tcg_target_long val,
- const TCGArgConstraint *arg_ct)
+ const TCGArgConstraint *arg_ct)
{
int ct;
ct = arg_ct->ct;
- if (ct & TCG_CT_CONST)
+ if (ct & TCG_CT_CONST) {
return 1;
- else if ((ct & TCG_CT_CONST_ARM) && check_fit_imm(val))
+ } else if ((ct & TCG_CT_CONST_ARM) && check_fit_imm(val)) {
return 1;
- else
+ } else if ((ct & TCG_CT_CONST_INV) && check_fit_imm(~val)) {
+ return 1;
+ } else {
return 0;
+ }
}
enum arm_data_opc_e {
@@ -1535,6 +1544,7 @@ static uint8_t *tb_ret_addr;
static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
const TCGArg *args, const int *const_args)
{
+ TCGArg a0, a1, a2;
int c;
switch (opc) {
@@ -1639,11 +1649,19 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
c = ARITH_SUB;
goto gen_arith;
case INDEX_op_and_i32:
+ a0 = args[0], a1 = args[1], a2 = args[2];
c = ARITH_AND;
- goto gen_arith;
+ if (const_args[2] && check_fit_imm(~a2)) {
+ c = ARITH_BIC, a2 = ~a2;
+ }
+ goto gen_arith2;
case INDEX_op_andc_i32:
+ a0 = args[0], a1 = args[1], a2 = args[2];
c = ARITH_BIC;
- goto gen_arith;
+ if (const_args[2] && check_fit_imm(~a2)) {
+ c = ARITH_AND, a2 = ~a2;
+ }
+ goto gen_arith2;
case INDEX_op_or_i32:
c = ARITH_ORR;
goto gen_arith;
@@ -1651,7 +1669,9 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
c = ARITH_EOR;
/* Fall through. */
gen_arith:
- tcg_out_dat_rI(s, COND_AL, c, args[0], args[1], args[2],
const_args[2]);
+ a0 = args[0], a1 = args[1], a2 = args[2];
+ gen_arith2:
+ tcg_out_dat_rI(s, COND_AL, c, a0, a1, a2, const_args[2]);
break;
case INDEX_op_add2_i32:
tcg_out_dat_reg2(s, COND_AL, ARITH_ADD, ARITH_ADC,
@@ -1836,8 +1856,8 @@ static const TCGTargetOpDef arm_op_defs[] = {
{ INDEX_op_mul_i32, { "r", "r", "r" } },
{ INDEX_op_mulu2_i32, { "r", "r", "r", "r" } },
{ INDEX_op_muls2_i32, { "r", "r", "r", "r" } },
- { INDEX_op_and_i32, { "r", "r", "rI" } },
- { INDEX_op_andc_i32, { "r", "r", "rI" } },
+ { INDEX_op_and_i32, { "r", "r", "rIK" } },
+ { INDEX_op_andc_i32, { "r", "r", "rIK" } },
{ INDEX_op_or_i32, { "r", "r", "rI" } },
{ INDEX_op_xor_i32, { "r", "r", "rI" } },
{ INDEX_op_neg_i32, { "r", "r" } },
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index cb89419..c4970d6 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -49,8 +49,6 @@ typedef enum {
#define TCG_TARGET_NB_REGS 16
-#define TCG_CT_CONST_ARM 0x100
-
/* used for function call generation */
#define TCG_REG_CALL_STACK TCG_REG_R13
#define TCG_TARGET_STACK_ALIGN 8
--
1.8.1.2
