It looks like this is only a problem in Thumb mode; the equivalent bug
in ARM mode was fixed in commit c67b6b71 back in 2009.
Can you make the test case dtb and image available? That would help in
testing...
** Changed in: qemu
Status: New => Confirmed
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https://bugs.launchpad.net/bugs/1079080
Title:
ARM instruction "srs" wrong behaviour
Status in QEMU:
Confirmed
Bug description:
Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R :
"Store Return State stores the LR and SPSR of the current mode to the stack
of a specified mode"
Problem:
When executing this instruction, the register stored is CPSR instead of SPSR.
Context:
Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore)
with the following command line:
qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb
/home/vcesson/workspace/xilinx_zynq.dtb -kernel
install/tests/io/serial/current/tests/serial2 -S -s -nographic
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