This will allow us to gradually change the existing
cpu_init()/cpu_copy() code to use QOM, and to gradually move CPU_COMMON
fields to CPUState.
The existing implementations were mechanically changed to be called
'old_cpu_init', and a wrapper was added to all architectures. Later the
wrappers and old implementations can be replaced by proper QOM-based
ones.
Signed-off-by: Eduardo Habkost <ehabk...@redhat.com>
---
bsd-user/main.c | 2 +-
exec.c | 2 +-
hw/alpha_dp264.c | 2 +-
hw/an5206.c | 2 +-
hw/dummy_m68k.c | 2 +-
hw/mcf5208.c | 2 +-
hw/puv3.c | 2 +-
hw/shix.c | 2 +-
linux-user/main.c | 2 +-
target-alpha/cpu.h | 3 ++-
target-arm/cpu.h | 3 ++-
target-cris/cpu.h | 3 ++-
target-i386/cpu.h | 3 ++-
target-lm32/cpu.h | 3 ++-
target-m68k/cpu.h | 3 ++-
target-microblaze/cpu.h | 3 ++-
target-mips/cpu.h | 3 ++-
target-openrisc/cpu.h | 3 ++-
target-ppc/cpu.h | 3 ++-
target-s390x/cpu.h | 3 ++-
target-sh4/cpu.h | 3 ++-
target-sparc/cpu.h | 3 ++-
target-unicore32/cpu.h | 3 ++-
target-xtensa/cpu.h | 3 ++-
24 files changed, 39 insertions(+), 24 deletions(-)
diff --git a/bsd-user/main.c b/bsd-user/main.c
index 095ae8e..9372142 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -912,7 +912,7 @@ int main(int argc, char **argv)
cpu_exec_init_all();
/* NOTE: we need to init the CPU at this stage to get
qemu_host_page_size */
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
if (!env) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/exec.c b/exec.c
index 4c1246a..8e8a852 100644
--- a/exec.c
+++ b/exec.c
@@ -526,7 +526,7 @@ void cpu_abort(CPUArchState *env, const char *fmt, ...)
CPUArchState *cpu_copy(CPUArchState *env)
{
- CPUArchState *new_env = cpu_init(env->cpu_model_str);
+ CPUArchState *new_env = CPU_GET_ENV(cpu_init(env->cpu_model_str));
CPUArchState *next_cpu = new_env->next_cpu;
int cpu_index = new_env->cpu_index;
#if defined(TARGET_HAS_ICE)
diff --git a/hw/alpha_dp264.c b/hw/alpha_dp264.c
index 76d8ae8..0b3e30d 100644
--- a/hw/alpha_dp264.c
+++ b/hw/alpha_dp264.c
@@ -62,7 +62,7 @@ static void clipper_init(QEMUMachineInitArgs *args)
/* Create up to 4 cpus. */
memset(cpus, 0, sizeof(cpus));
for (i = 0; i < smp_cpus; ++i) {
- cpus[i] = cpu_init(cpu_model ? cpu_model : "ev67");
+ cpus[i] = CPU_GET_ENV(cpu_init(cpu_model ? cpu_model : "ev67"));
}
cpus[0]->trap_arg0 = ram_size;
diff --git a/hw/an5206.c b/hw/an5206.c
index d887c0e..1c13385 100644
--- a/hw/an5206.c
+++ b/hw/an5206.c
@@ -34,7 +34,7 @@ static void an5206_init(QEMUMachineInitArgs *args)
if (!cpu_model)
cpu_model = "m5206";
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
if (!env) {
hw_error("Unable to find m68k CPU definition\n");
}
diff --git a/hw/dummy_m68k.c b/hw/dummy_m68k.c
index 20f790b..c33f8b7 100644
--- a/hw/dummy_m68k.c
+++ b/hw/dummy_m68k.c
@@ -30,7 +30,7 @@ static void dummy_m68k_init(QEMUMachineInitArgs *args)
if (!cpu_model)
cpu_model = "cfv4e";
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
if (!env) {
fprintf(stderr, "Unable to find m68k CPU definition\n");
exit(1);
diff --git a/hw/mcf5208.c b/hw/mcf5208.c
index b1db549..2565275 100644
--- a/hw/mcf5208.c
+++ b/hw/mcf5208.c
@@ -203,7 +203,7 @@ static void mcf5208evb_init(QEMUMachineInitArgs *args)
if (!cpu_model)
cpu_model = "m5208";
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
if (!env) {
fprintf(stderr, "Unable to find m68k CPU definition\n");
exit(1);
diff --git a/hw/puv3.c b/hw/puv3.c
index 3d77349..edd0132 100644
--- a/hw/puv3.c
+++ b/hw/puv3.c
@@ -107,7 +107,7 @@ static void puv3_init(QEMUMachineInitArgs *args)
cpu_model = "UniCore-II";
}
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
if (!env) {
hw_error("Unable to find CPU definition\n");
}
diff --git a/hw/shix.c b/hw/shix.c
index b56dd54..436f2df 100644
--- a/hw/shix.c
+++ b/hw/shix.c
@@ -51,7 +51,7 @@ static void shix_init(QEMUMachineInitArgs *args)
cpu_model = "any";
printf("Initializing CPU\n");
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
/* Allocate memory space */
printf("Allocating ROM\n");
diff --git a/linux-user/main.c b/linux-user/main.c
index 25e35cd..36ebb82 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -3486,7 +3486,7 @@ int main(int argc, char **argv, char **envp)
cpu_exec_init_all();
/* NOTE: we need to init the CPU at this stage to get
qemu_host_page_size */
- env = cpu_init(cpu_model);
+ env = CPU_GET_ENV(cpu_init(cpu_model));
if (!env) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 9939d61..c04d436 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -290,7 +290,8 @@ struct CPUAlphaState {
int implver;
};
-#define cpu_init cpu_alpha_init
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+#define old_cpu_init cpu_alpha_init
#define cpu_exec cpu_alpha_exec
#define cpu_gen_code cpu_alpha_gen_code
#define cpu_signal_handler cpu_alpha_signal_handler
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index e4ff918..8b14bfc 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -625,7 +625,8 @@ static inline bool cp_access_ok(CPUARMState *env,
#define TARGET_PHYS_ADDR_SPACE_BITS 40
#define TARGET_VIRT_ADDR_SPACE_BITS 32
-static inline CPUARMState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUARMState *old_cpu_init(const char *cpu_model)
{
ARMCPU *cpu = cpu_arm_init(cpu_model);
if (cpu) {
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 2c27506..e992f06 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -218,7 +218,8 @@ enum {
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
-static inline CPUCRISState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUCRISState *old_cpu_init(const char *cpu_model)
{
CRISCPU *cpu = cpu_cris_init(cpu_model);
if (cpu == NULL) {
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 386c4f6..c381b03 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -1034,7 +1034,8 @@ uint64_t cpu_get_tsc(CPUX86State *env);
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
-static inline CPUX86State *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUX86State *old_cpu_init(const char *cpu_model)
{
X86CPU *cpu = cpu_x86_init(cpu_model);
if (cpu == NULL) {
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 7243b4f..9cfa7b1 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -199,7 +199,8 @@ int cpu_lm32_signal_handler(int host_signum, void *pinfo,
void lm32_translate_init(void);
void cpu_lm32_set_phys_msb_ignore(CPULM32State *env, int value);
-static inline CPULM32State *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPULM32State *old_cpu_init(const char *cpu_model)
{
LM32CPU *cpu = cpu_lm32_init(cpu_model);
if (cpu == NULL) {
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index f4fcdee..fbb35dc 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -214,7 +214,8 @@ void register_m68k_insns (CPUM68KState *env);
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
-#define cpu_init cpu_m68k_init
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+#define old_cpu_init cpu_m68k_init
#define cpu_exec cpu_m68k_exec
#define cpu_gen_code cpu_m68k_gen_code
#define cpu_signal_handler cpu_m68k_signal_handler
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h
index 585bbd6..c41354e 100644
--- a/target-microblaze/cpu.h
+++ b/target-microblaze/cpu.h
@@ -295,7 +295,8 @@ enum {
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
-static inline CPUMBState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUMBState *old_cpu_init(const char *cpu_model)
{
MicroBlazeCPU *cpu = cpu_mb_init(cpu_model);
if (cpu == NULL) {
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index aebb2d5..9162ced 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -632,7 +632,8 @@ int cpu_mips_exec(CPUMIPSState *s);
MIPSCPU *cpu_mips_init(const char *cpu_model);
int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
-static inline CPUMIPSState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUMIPSState *old_cpu_init(const char *cpu_model)
{
MIPSCPU *cpu = cpu_mips_init(cpu_model);
if (cpu == NULL) {
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index ca607b3..13220a5 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -386,7 +386,8 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu,
int *prot, target_ulong address, int rw);
#endif
-static inline CPUOpenRISCState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUOpenRISCState *old_cpu_init(const char *cpu_model)
{
OpenRISCCPU *cpu = cpu_openrisc_init(cpu_model);
if (cpu) {
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 742d4f8..58404b8 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1216,7 +1216,8 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int
gprn)
int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp);
int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val);
-static inline CPUPPCState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUPPCState *old_cpu_init(const char *cpu_model)
{
PowerPCCPU *cpu = cpu_ppc_init(cpu_model);
if (cpu == NULL) {
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 0f9a1f7..2edebf1 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -345,7 +345,8 @@ static inline void cpu_set_tls(CPUS390XState *env,
target_ulong newtls)
env->aregs[1] = newtls & 0xffffffffULL;
}
-#define cpu_init(model) (&cpu_s390x_init(model)->env)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+#define old_cpu_init(model) (&cpu_s390x_init(model)->env)
#define cpu_exec cpu_s390x_exec
#define cpu_gen_code cpu_s390x_gen_code
#define cpu_signal_handler cpu_s390x_signal_handler
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 9a0e72b..f6ba00e 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -232,7 +232,8 @@ void cpu_load_tlb(CPUSH4State * env);
#include "softfloat.h"
-static inline CPUSH4State *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUSH4State *old_cpu_init(const char *cpu_model)
{
SuperHCPU *cpu = cpu_sh4_init(cpu_model);
if (cpu == NULL) {
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 013ecbd..ca2bdb1 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -592,7 +592,8 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env,
target_ulong addr,
int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
#ifndef NO_CPU_IO_DEFS
-static inline CPUSPARCState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUSPARCState *old_cpu_init(const char *cpu_model)
{
SPARCCPU *cpu = cpu_sparc_init(cpu_model);
if (cpu == NULL) {
diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h
index 676c5d9..86a6959 100644
--- a/target-unicore32/cpu.h
+++ b/target-unicore32/cpu.h
@@ -122,7 +122,8 @@ void cpu_asr_write(CPUUniCore32State *env1, target_ulong
val, target_ulong mask)
#define UC32_HWCAP_CMOV 4 /* 1 << 2 */
#define UC32_HWCAP_UCF64 8 /* 1 << 3 */
-#define cpu_init uc32_cpu_init
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+#define old_cpu_init uc32_cpu_init
#define cpu_exec uc32_cpu_exec
#define cpu_signal_handler uc32_cpu_signal_handler
#define cpu_handle_mmu_fault uc32_cpu_handle_mmu_fault
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 08fd5bc..65f2af3 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -375,7 +375,8 @@ typedef struct CPUXtensaState {
XtensaCPU *cpu_xtensa_init(const char *cpu_model);
-static inline CPUXtensaState *cpu_init(const char *cpu_model)
+#define cpu_init(m) ENV_GET_CPU(old_cpu_init(m))
+static inline CPUXtensaState *old_cpu_init(const char *cpu_model)
{
XtensaCPU *cpu = cpu_xtensa_init(cpu_model);
if (cpu == NULL) {
--
1.7.11.7
