On 08/12/2007, Armin <[EMAIL PROTECTED]> wrote: > Hello, > > Please consider this patch for inclusion. > > This adds MMC and the rest of the FPGA irq definitions for the Mainstone II
Why are both the write-protect and card-detect signals being connected to one input? If one of the inputs doesn't exist then just pass NULL for the parameter, and if they are supposed to be ORed or ANDed then this needs to be done explicitely. The way it is in the patch the input will randomly take the level of one of the two signals. Regards
