From: Petar Jovanovic <pet...@mips.com>
Content of register rs should be shifted for pos before applying a mask.
This change contains both fix for the instruction and to the existing test.
Signed-off-by: Petar Jovanovic <pet...@mips.com>
---
target-mips/dsp_helper.c | 2 +-
tests/tcg/mips/mips32-dsp/insv.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c
index e7949c2..fda5f04 100644
--- a/target-mips/dsp_helper.c
+++ b/target-mips/dsp_helper.c
@@ -3152,7 +3152,7 @@ target_ulong helper_##name(CPUMIPSState *env,
target_ulong rs, \
\
filter = ((int32_t)0x01 << size) - 1; \
filter = filter << pos; \
- temprs = rs & filter; \
+ temprs = (rs << pos) & filter; \
temprt = rt & ~filter; \
temp = temprs | temprt; \
\
diff --git a/tests/tcg/mips/mips32-dsp/insv.c b/tests/tcg/mips/mips32-dsp/insv.c
index 7e3b047..243b007 100644
--- a/tests/tcg/mips/mips32-dsp/insv.c
+++ b/tests/tcg/mips/mips32-dsp/insv.c
@@ -10,7 +10,7 @@ int main()
dsp = 0x305;
rt = 0x12345678;
rs = 0x87654321;
- result = 0x12345338;
+ result = 0x12345438;
__asm
("wrdsp %2, 0x03\n\t"
"insv %0, %1\n\t"
--
1.7.5.4
