> -----Original Message----- > From: qemu-devel-bounces+ericj=mips....@nongnu.org [mailto:qemu-devel- > bounces+ericj=mips....@nongnu.org] On Behalf Of Aurelien Jarno > Sent: Friday, November 16, 2012 3:04 AM > To: qemu-devel@nongnu.org > Cc: Aurelien Jarno > Subject: [Qemu-devel] [PATCH 3/7] target-mips: add unions to access DSP > elements > > Instead of playing with bit shifting, add two unions (one for 32-bit > values, one for 64-bit ones) to access all the DSP elements with the > correct type. > > This make the code easier to read and less error prone, and allow GCC > to vectorize the code in some cases. > > Signed-off-by: Aurelien Jarno <aurel...@aurel32.net> > --- > target-mips/dsp_helper.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c > index e7949c2..8015d8d 100644 > --- a/target-mips/dsp_helper.c > +++ b/target-mips/dsp_helper.c > @@ -20,6 +20,28 @@ > #include "cpu.h" > #include "helper.h" > > +/* As the byte ordering doesn't matter, i.e. all columns are treated > + identically, these unions can be used directly. */ > +typedef union { > + uint8_t ub[4]; > + int8_t sb[4]; > + uint16_t uh[2]; > + int16_t sh[2]; > + uint32_t uw[1]; > + int32_t sw[1]; > +} DSP32Value; > + > +typedef union { > + uint8_t ub[8]; > + int8_t sb[8]; > + uint16_t uh[4]; > + int16_t sh[4]; > + uint32_t uw[2]; > + int32_t sw[2]; > + uint64_t ul[1]; > + int64_t sl[1]; > +} DSP64Value; > + > /*** MIPS DSP internal functions begin ***/ > #define MIPSDSP_ABS(x) (((x) >= 0) ? x : -x) > #define MIPSDSP_OVERFLOW(a, b, c, d) (!(!((a ^ b ^ -1) & (a ^ c) & d))) > -- > 1.7.10.4 >
Reviewed-by: Eric Johnson <er...@mips.com>
