This patch series fixes the TCG arm backend for the MIPS target, as well
as for big endian targets when not using the ARMv6+ instructions set.
The corresponding patches are candidate for a stable release.
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Changes v2 -> v3:
- patch 1:
- The new code allow up to 20 bits to be loaded (and not 24 bits).
Change the comments and the assert accordingly.
Changes v1 -> v2:
- patch 1:
- added an assert to make sure the TLB offset fits within 24 bits
- added an assert to make sure both registers are different in ldr_wb
- patches 4 and 5 (optimizations) have been dropped and will be
resubmitted again (when I can find some time to work on them).
Aurelien Jarno (3):
tcg/arm: fix TLB access in qemu-ld/st ops
tcg/arm: fix cross-endian qemu_st16
target-openrisc: remove conflicting definitions from cpu.h
target-openrisc/cpu.h | 18 ---------
tcg/arm/tcg-target.c | 98 ++++++++++++++++++++++++++++++-------------------
2 files changed, 60 insertions(+), 56 deletions(-)
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1.7.10.4
