On Sat, Sep 22, 2012 at 11:45 AM, Andreas Färber <andreas.faer...@web.de> wrote:
> With QOM ARMCPU we can now distinguish between -cpu cortex-r4 and
> -cpu cortex-r4f despite identical MIDR.
>
> Signed-off-by: Andreas Färber <andreas.faer...@web.de>
> ---
> target-arm/cpu.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++
> 1 Datei geändert, 47 Zeilen hinzugefügt(+)
>
> diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> index 6726498..e176559 100644
> --- a/target-arm/cpu.c
> +++ b/target-arm/cpu.c
> @@ -405,6 +405,52 @@ static void cortex_r4_initfn(Object *obj)
> cpu->id_isar5 = 0x0;
> }
>
> +static const struct {
> + uint8_t r;
> + uint8_t p;
> + uint8_t value;
> +} cortexr4_fpsid_revs[] = {
> + { 1, 0, 0x3 },
> + { 1, 1, 0x4 },
> + { 1, 2, 0x6 },
> + { 1, 3, 0x7 },
> + { 1, 4, 0x8 },
> + {}
> +};
> +
> +static void cortex_r4f_initfn(Object *obj)
> +{
> + ARMCPU *cpu = ARM_CPU(obj);
> +
> + /* Cortex-R4F = Cortex-R4 + FPU */
> + cortex_r4_initfn(obj);
> +
> + set_feature(&cpu->env, ARM_FEATURE_VFP3);
> + /* TODO VFPv3-D16 */
> + {
> + /* PMM didn't like this dynamic revision lookup... */
> + /* TODO: maybe weave cross-checks into QOM properties instead? */
> + uint8_t r = (cpu->midr >> 20) & 0xf;
> + uint8_t p = cpu->midr & 0xf;
> + uint8_t rev = 0;
> + int i;
> + /* Calculate FPSID value matching to MIDR */
> + for (i = 0; cortexr4_fpsid_revs[i].r != 0; i++) {
You could use ARRAY_SIZE() to determine max index without the zero
entry. That way the number of entries would be known by the compiler
too.
> + if (cortexr4_fpsid_revs[i].r == r &&
> + cortexr4_fpsid_revs[i].p == p) {
> + rev = cortexr4_fpsid_revs[i].value;
> + break;
> + }
> + }
> + if (rev == 0) {
> + cpu_abort(&cpu->env,
> + "Cortex-R4F r%" PRIu8 "p%" PRIu8 " unsupported",
> + r, p);
> + }
> + cpu->reset_fpsid = 0x41023140 | (rev & 0xf);
> + }
> +}
> +
> static const ARMCPRegInfo cortexa8_cp_reginfo[] = {
> { .name = "L2LOCKDOWN", .cp = 15, .crn = 9, .crm = 0, .opc1 = 1, .opc2 =
> 0,
> .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
> @@ -761,6 +807,7 @@ static const ARMCPUInfo arm_cpus[] = {
> { .name = "arm11mpcore", .initfn = arm11mpcore_initfn },
> { .name = "cortex-m3", .initfn = cortex_m3_initfn },
> { .name = "cortex-r4", .initfn = cortex_r4_initfn },
> + { .name = "cortex-r4f", .initfn = cortex_r4f_initfn },
> { .name = "cortex-a8", .initfn = cortex_a8_initfn },
> { .name = "cortex-a9", .initfn = cortex_a9_initfn },
> { .name = "cortex-a15", .initfn = cortex_a15_initfn },
> --
> 1.7.10.4
>
>
