On Sunday 14 October 2007, J. Mayer wrote: > Here's an updated version of the code fetch optimisation patch against > current CVS. > As a remainder, this patch avoid use of softmmu helpers to fetch the > code in most case. A new target define TARGET_HAS_VLE_INSNS has been > added which is used to handle the case of an instruction that span 2 > pages, when the target CPU uses a variable-length instructions encoding. > For pure RISC, the code fetch is done using raw access routines.
> + unsigned long phys_pc; > + unsigned long phys_pc_start; These are ram offsets, not physical addresses. I recommend naming them as such to avoid confusion. > + opc = glue(glue(lds,SUFFIX),MEMSUFFIX)(virt_pc); > + /* Avoid softmmu access on next load */ > + /* XXX: dont: phys PC is not correct anymore > + * We could call get_phys_addr_code(env, pc); and remove the else > + * condition, here. > + */ > + //*start_pc = phys_pc; The commented out code is completely bogus, please remove it. The comment is also somewhat misleading/incorrect. The else would still be required for accesses that span a page boundary. The code itself looks ok, though I'd be surprised if it made a significant difference. We're always going to hit the fast-path TLB lookup case anyway. Paul
