On Fri, Sep 07, 2012 at 04:30:51PM +0200, Andreas Färber wrote: > Am 07.09.2012 06:26, schrieb Alexander Graf: > > Quoting Richard Henderson <r...@twiddle.net>: > > > >> On 09/06/2012 11:42 AM, Alexander Graf wrote: > >>> Richard, while at it, could you please check the s390x tcg target? > >>> Running any target on there seems to break in the TLB code for me. > >> > >> I did successfully run a simple linux-user test directly off blue's > >> patch set. It exercised a bit of fp and system calls (printf). > >> > >> I don't have a system environment set up at the moment... > > > > Ah, I am referring to s390x host code. Running qemu-system-x86_64 on > > s390x is what breaks for me. > > If, e.g., arm works on master that might rather point to tcg/s390x/ > CONFIG_PASS_AREG0 mode. >
This is likely the case. The register shift code in CONFIG_PASS_AREG0 case uses 3 registers for stores and 4 for loads. It should be the reverse. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurel...@aurel32.net http://www.aurel32.net
