Hi everyone, Attached is a patch that implements a table driver interrupt controller for the sh architecture. The tables that describes the registers and interrupt sources are very similar to the linux kernel code that I rewrote recently. Included are tables for sh775x but it should be fairly easy to add tables for other cpu models in the future if needed.
Only registers are hooked up to the cpu for now. No interrupts are delivered to the processor yet, but the association between register bit fields and interrupt sources works well. People that want to play with this can uncomment DEBUG_INTC in sh_intc.c to get printouts when the kernel enables various interrupt sources during boot. I'm going to continue working on this to hook up the processor, timers and serial ports as well. This is at least a good first step to share with the community. Please apply. / magnus
qemu-cvs-20071003-sh-intc.patch
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