Hi Peter,
On Wed, Aug 08, 2012 at 09:05:18AM +0100, Peter Maydell wrote:
> On 8 August 2012 08:38, 陳韋任 (Wei-Ren Chen) <che...@iis.sinica.edu.tw> wrote:
> > Just for research, we are studying if we can leave the guest page
> > table walk to underlying hardware rather than using software emulation
> > (like current approach). So, maybe (if *doable*) we can use x86 hardware
> > to help us to walk guest (like ARM) page table. The rough idea is we
> > have to maintain a x86-format shadow page table for the corresponding
> > ARM page table, point host cr3 to the shadow page table, and let x86
> > hardware do its job. The problem is, we have to aware that guest is
> > modifying its guest page table entry so that we can sync its corrsponding
> > shadow page table. But, we still haven't find a good way to know when
> > the guest OS is modifying guest page table entry.
>
> Make it read-only for the guest, and then when you get the exception when
> the guest tries to write it, you can (a) do what you need to do and (b)
> emulate the failing write insn.
Let me try if I understand you correctly,
Get cp15:c2 value (guest virtual address), then call something like
qemu_get_ram_ptr with cp15:c2 to get its corresponding host virtual
address. Then we mprotect(hva, 16k, PROT_READ).
Is that a right direction? That's what I thought when you said make it
read-only. But after reading Blue's reply [1], it seems he give another
approach.
Regards,
chenwj
[1] http://www.mail-archive.com/qemu-devel@nongnu.org/msg125104.html
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj
