On Wed, 2007-09-19 at 16:35 +0000, Hollis Blanchard wrote: > On Wed, 19 Sep 2007 05:44:04 +0000, Jocelyn Mayer wrote: > > > CVSROOT: /sources/qemu > > Module name: qemu > > Changes by: Jocelyn Mayer <j_mayer> 07/09/19 05:44:04 > > > > Modified files: > > target-ppc : helper.c op.c op_helper.c op_helper.h > > translate.c > > > > Log message: > > Code provision for PowerPC BookE MMU model support. > > Better MSR flags initialisation. > > > > CVSWeb URLs: > > http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.53&r2=1.54 > > http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op.c?cvsroot=qemu&r1=1.40&r2=1.41 > > http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemu&r1=1.37&r2=1.38 > > http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.h?cvsroot=qemu&r1=1.11&r2=1.12 > > http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate.c?cvsroot=qemu&r1=1.64&r2=1.65 > > tlbwe and tlbre do not use PID; they use MMUCR[STID]. > > Also, IBM and Freescale Book E architectures are very different here, so I > would suggest naming these functions something more specific than > e.g. "do_booke_tlbwe". You're really implementing IBM's 440 > architecture here.
Yes, you're right, this is incorrect for most (or all) cases. I did not notice what the Power specification says that tlbre and tlbwe are implementation dependent. I just compared IBM 440 and Freescale e500 TLB models and, you're absolutelly right, they actually use different implementation specific registers. Thanks for reporting this ! I will start adding big warnings in my code until I can recode it in a better way ;-) -- J. Mayer <[EMAIL PROTECTED]> Never organized
