A while ago I made a change to make MIPS16 code use the OPC_JALS opcode
"pinched" from microMIPS support as well as the artificial OPC_JALXS
opcode I made up on that occasion so that the fixed 16-bit delay slot size
of MIPS16 instructions is handled uniformly across code, just as the
microMIPS delay slot size constraints are. As a result of this change
OPC_JALX is never used for MIPS16 emulation anymore, it's now only ever
used in the standard MIPS and microMIPS modes.
Someone was kind enough to push that change upstream on my behalf, but
somehow the piece to update the comment accordingly was missed and not
propagated. Here's an update to remove the obsolete and now misleading
comment.
Signed-off-by: Maciej W. Rozycki <ma...@codesourcery.com>
---
Mostly obvious, please apply.
Maciej
qemu-mips16-jal.diff
Index: qemu-git-trunk/target-mips/translate.c
===================================================================
--- qemu-git-trunk.orig/target-mips/translate.c 2012-06-04 02:38:47.000000000
+0100
+++ qemu-git-trunk/target-mips/translate.c 2012-06-04 03:06:38.975449423
+0100
@@ -69,7 +69,7 @@ enum {
OPC_BLEZL = (0x16 << 26),
OPC_BGTZ = (0x07 << 26),
OPC_BGTZL = (0x17 << 26),
- OPC_JALX = (0x1D << 26), /* MIPS 16 only */
+ OPC_JALX = (0x1D << 26),
OPC_JALXS = OPC_JALX | 0x5,
/* Load and stores */
OPC_LDL = (0x1A << 26),
