[PATCH v7 03/11] hw/loongarch: add misc register supoort avecintc

[Song Gao]

Add feature register and misc register for avecintc feature checking and
setting

Signed-off-by: Song Gao <gaos...@loongson.cn>
Reviewed-by: Bibo Mao <maob...@loongson.cn>
---
 hw/loongarch/virt.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 37c38ae63f..0883f3a272 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -561,6 +561,10 @@ static MemTxResult virt_iocsr_misc_write(void *opaque, 
hwaddr addr,
             return MEMTX_OK;
         }
 
+        if (virt_has_avecintc(lvms) && val & BIT(IOCSRM_AVEC_EN)) {
+            lvms->misc_status |= BIT(IOCSRM_AVEC_EN);
+        }
+
         features = address_space_ldl(&lvms->as_iocsr,
                                      EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG,
                                      attrs, NULL);
@@ -596,6 +600,9 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, 
hwaddr addr,
         break;
     case FEATURE_REG:
         ret = BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI);
+        if (virt_has_avecintc(lvms)) {
+            ret |= BIT(IOCSRF_AVEC);
+        }
         if (kvm_enabled()) {
             ret |= BIT(IOCSRF_VM);
         }
@@ -625,6 +632,10 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, 
hwaddr addr,
         if (features & BIT(EXTIOI_ENABLE_INT_ENCODE)) {
             ret |= BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE);
         }
+        if (virt_has_avecintc(lvms) &&
+            (lvms->misc_status & BIT(IOCSRM_AVEC_EN))) {
+            ret |= BIT_ULL(IOCSRM_AVEC_EN);
+        }
         break;
     default:
         g_assert_not_reached();
-- 
2.41.0