Reviewed-by: Taylor Simpson <ltaylorsimp...@gmail.com>
Signed-off-by: Brian Cain <brian.c...@oss.qualcomm.com>
---
MAINTAINERS | 1 +
configs/devices/hexagon-softmmu/default.mak | 7 +++++++
configs/targets/hexagon-softmmu.mak | 6 ++++++
target/hexagon/cpu.h | 4 ----
target/Kconfig | 1 +
target/hexagon/Kconfig | 2 ++
target/hexagon/meson.build | 12 +++++++++++-
7 files changed, 28 insertions(+), 5 deletions(-)
create mode 100644 configs/devices/hexagon-softmmu/default.mak
create mode 100644 configs/targets/hexagon-softmmu.mak
create mode 100644 target/hexagon/Kconfig
diff --git a/MAINTAINERS b/MAINTAINERS
index efc237b27b..e19fcf9e69 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -237,6 +237,7 @@ F: linux-user/hexagon/
F: tests/tcg/hexagon/
F: disas/hexagon.c
F: configs/targets/hexagon-linux-user/default.mak
+F: configs/devices/hexagon-softmmu/default.mak
F: docker/dockerfiles/debian-hexagon-cross.docker
F: gdb-xml/hexagon*.xml
F: docs/system/target-hexagon.rst
diff --git a/configs/devices/hexagon-softmmu/default.mak
b/configs/devices/hexagon-softmmu/default.mak
new file mode 100644
index 0000000000..08e709aea7
--- /dev/null
+++ b/configs/devices/hexagon-softmmu/default.mak
@@ -0,0 +1,7 @@
+# Default configuration for hexagon-softmmu
+
+# Uncomment the following lines to disable these optional devices:
+
+# Boards are selected by default, uncomment to keep out of the build.
+# CONFIG_HEX_DSP=y
+# CONFIG_L2VIC=y
diff --git a/configs/targets/hexagon-softmmu.mak
b/configs/targets/hexagon-softmmu.mak
new file mode 100644
index 0000000000..8c208bf468
--- /dev/null
+++ b/configs/targets/hexagon-softmmu.mak
@@ -0,0 +1,6 @@
+# Default configuration for hexagon-softmmu
+
+TARGET_ARCH=hexagon
+TARGET_SUPPORTS_MTTCG=y
+TARGET_XML_FILES=gdb-xml/hexagon-core.xml gdb-xml/hexagon-hvx.xml
gdb-xml/hexagon-sys.xml
+TARGET_LONG_BITS=32
diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index 86fbe30dbb..57840d2100 100644
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -33,10 +33,6 @@
#include "mmvec/mmvec.h"
#include "hw/registerfields.h"
-#ifndef CONFIG_USER_ONLY
-#error "Hexagon does not support system emulation"
-#endif
-
#ifndef CONFIG_USER_ONLY
#include "reg_fields.h"
typedef struct CPUHexagonTLBContext CPUHexagonTLBContext;
diff --git a/target/Kconfig b/target/Kconfig
index d0c7b59d9c..37781146b9 100644
--- a/target/Kconfig
+++ b/target/Kconfig
@@ -16,6 +16,7 @@ source sh4/Kconfig
source sparc/Kconfig
source tricore/Kconfig
source xtensa/Kconfig
+source hexagon/Kconfig
config TARGET_BIG_ENDIAN
bool
diff --git a/target/hexagon/Kconfig b/target/hexagon/Kconfig
new file mode 100644
index 0000000000..7e556f3506
--- /dev/null
+++ b/target/hexagon/Kconfig
@@ -0,0 +1,2 @@
+config HEXAGON
+ bool
diff --git a/target/hexagon/meson.build b/target/hexagon/meson.build
index 3ec53010fa..d2b56b9e65 100644
--- a/target/hexagon/meson.build
+++ b/target/hexagon/meson.build
@@ -245,6 +245,7 @@ decodetree_trans_funcs_generated = custom_target(
command: [python, files('gen_trans_funcs.py'), semantics_generated,
'@OUTPUT@'],
)
hexagon_ss.add(decodetree_trans_funcs_generated)
+hexagon_softmmu_ss = ss.source_set()
hexagon_ss.add(files(
'cpu.c',
@@ -264,6 +265,13 @@ hexagon_ss.add(files(
'mmvec/system_ext_mmvec.c',
))
+hexagon_softmmu_ss.add(files(
+ 'hex_mmu.c',
+ 'hex_interrupts.c',
+ 'hexswi.c',
+ 'machine.c',
+))
+
#
# Step 4.5
# We use flex/bison based idef-parser to generate TCG code for a lot
@@ -273,7 +281,8 @@ hexagon_ss.add(files(
# idef-generated-enabled-instructions
#
idef_parser_enabled = get_option('hexagon_idef_parser')
-if idef_parser_enabled and 'hexagon-linux-user' in target_dirs
+if idef_parser_enabled and ('hexagon-linux-user' in target_dirs or
+ 'hexagon-softmmu' in target_dirs)
idef_parser_input_generated = custom_target(
'idef_parser_input.h.inc',
output: 'idef_parser_input.h.inc',
@@ -400,3 +409,4 @@ analyze_funcs_generated = custom_target(
hexagon_ss.add(analyze_funcs_generated)
target_arch += {'hexagon': hexagon_ss}
+target_system_arch += {'hexagon': hexagon_softmmu_ss}
--
2.34.1
