On Sun, 3 Aug 2025 at 02:41, Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
> ---
> target/arm/tcg/translate-a64.c | 31 +++++++++++++++++++++++++++++++
> target/arm/tcg/a64.decode | 4 ++++
> 2 files changed, 35 insertions(+)
>
> diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
> index 64a845d5fb..0c78d4bb79 100644
> --- a/target/arm/tcg/translate-a64.c
> +++ b/target/arm/tcg/translate-a64.c
> @@ -8304,6 +8304,37 @@ static void gen_cls32(TCGv_i64 tcg_rd, TCGv_i64 tcg_rn)
> TRANS(CLZ, gen_rr, a->rd, a->rn, a->sf ? gen_clz64 : gen_clz32)
> TRANS(CLS, gen_rr, a->rd, a->rn, a->sf ? tcg_gen_clrsb_i64 : gen_cls32)
>
> +static void gen_ctz32(TCGv_i64 tcg_rd, TCGv_i64 tcg_rn)
> +{
> + TCGv_i32 t32 = tcg_temp_new_i32();
> +
> + tcg_gen_extrl_i64_i32(t32, tcg_rn);
> + tcg_gen_ctzi_i32(t32, t32, 32);
> + tcg_gen_extu_i32_i64(tcg_rd, t32);
> +}
> +
> +static void gen_ctz64(TCGv_i64 tcg_rd, TCGv_i64 tcg_rn)
> +{
> + tcg_gen_ctzi_i64(tcg_rd, tcg_rn, 64);
> +}
> +
> +static void gen_cnt32(TCGv_i64 tcg_rd, TCGv_i64 tcg_rn)
> +{
> + gen_wrap2_i32(tcg_rn, tcg_rn, tcg_gen_ctpop_i32);
> +}
> +
> +static void gen_abs32(TCGv_i64 tcg_rd, TCGv_i64 tcg_rn)
> +{
> + gen_wrap2_i32(tcg_rn, tcg_rn, tcg_gen_abs_i32);
> +}
I'm squashing in the following trivial fix:
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -8324,12 +8324,12 @@ static void gen_ctz64(TCGv_i64 tcg_rd, TCGv_i64 tcg_rn)
static void gen_cnt32(TCGv_i64 tcg_rd, TCGv_i64 tcg_rn)
{
- gen_wrap2_i32(tcg_rn, tcg_rn, tcg_gen_ctpop_i32);
+ gen_wrap2_i32(tcg_rd, tcg_rn, tcg_gen_ctpop_i32);
}
static void gen_abs32(TCGv_i64 tcg_rd, TCGv_i64 tcg_rn)
{
- gen_wrap2_i32(tcg_rn, tcg_rn, tcg_gen_abs_i32);
+ gen_wrap2_i32(tcg_rd, tcg_rn, tcg_gen_abs_i32);
}
TRANS_FEAT(CTZ, aa64_cssc, gen_rr, a->rd, a->rn,
-- PMM
