On 8/25/25 08:27, Edgar E. Iglesias wrote:
From: "Edgar E. Iglesias" <edgar.igles...@amd.com>
Handle signed division overflows as specified in UG984:
https://docs.amd.com/r/en-US/ug984-vivado-microblaze-ref/idiv
Signed-off-by: Edgar E. Iglesias <edgar.igles...@amd.com>
---
target/microblaze/cpu.h | 1 +
target/microblaze/op_helper.c | 15 +++++++++++++++
2 files changed, 16 insertions(+)
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 3ce28b302f..7dd86653f0 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -87,6 +87,7 @@ typedef struct CPUArchState CPUMBState;
#define ESR_ESS_FSL_OFFSET 5
#define ESR_ESS_MASK (0x7f << 5)
+#define ESR_ESS_DEC_OF (1 << 20) /* DEC: 0=DBZ, 1=OF */
That's bit 20 big-endian, so bit (1 << 11).
Otherwise,
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
r~
