This commit adds initialization of TCG_AREG0 and TCG_REG_CALL_STACK at the beginning of each TB. The CPUArchState struct and the stack array are passed from the caller via the WasmContext structure. The BLOCK_IDX variable is initialized to 0 as TB execution begins at the first block.
Signed-off-by: Kohei Tokunaga <ktokunaga.m...@gmail.com> --- tcg/wasm.h | 10 ++++++++++ tcg/wasm/tcg-target.c.inc | 19 +++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/tcg/wasm.h b/tcg/wasm.h index fba8b16503..91567bb964 100644 --- a/tcg/wasm.h +++ b/tcg/wasm.h @@ -22,6 +22,16 @@ struct WasmContext { * Buffer to store 128bit return value on call. */ void *buf128; + + /* + * Pointer to the CPUArchState struct. + */ + CPUArchState *env; + + /* + * Pointer to a stack array. + */ + uint64_t *stack; }; #endif diff --git a/tcg/wasm/tcg-target.c.inc b/tcg/wasm/tcg-target.c.inc index 6b8df4e9d7..0182d072ca 100644 --- a/tcg/wasm/tcg-target.c.inc +++ b/tcg/wasm/tcg-target.c.inc @@ -2419,11 +2419,30 @@ static inline void tcg_target_qemu_prologue(TCGContext *s) static void tcg_out_tb_start(TCGContext *s) { + intptr_t ofs; + init_sub_buf(); init_blocks(); init_label_info(); init_helpers(); + /* Initialize fundamental registers */ + tcg_wasm_out_op_idx(s, OPC_GLOBAL_GET, REG_IDX(TCG_AREG0)); + tcg_wasm_out_op(s, OPC_I64_EQZ); + tcg_wasm_out_op_block(s, OPC_IF, BLOCK_NORET); + + ofs = tcg_wasm_out_get_ctx(s, CTX_OFFSET(env)); + tcg_wasm_out_op_ldst(s, OPC_I64_LOAD, 0, ofs); + tcg_wasm_out_op_idx(s, OPC_GLOBAL_SET, REG_IDX(TCG_AREG0)); + + ofs = tcg_wasm_out_get_ctx(s, CTX_OFFSET(stack)); + tcg_wasm_out_op_ldst(s, OPC_I64_LOAD, 0, ofs); + tcg_wasm_out_op_idx(s, OPC_GLOBAL_SET, REG_IDX(TCG_REG_CALL_STACK)); + tcg_wasm_out_op(s, OPC_END); + + tcg_wasm_out_op_const(s, OPC_I64_CONST, 0); + tcg_wasm_out_op_idx(s, OPC_GLOBAL_SET, BLOCK_IDX); + tcg_wasm_out_op_block(s, OPC_LOOP, BLOCK_NORET); tcg_wasm_out_op_idx(s, OPC_GLOBAL_GET, BLOCK_IDX); tcg_wasm_out_op(s, OPC_I64_EQZ); -- 2.43.0