[PATCH 1/9] target/loongarch: Use auto method with PTW feature

[Bibo Mao]

PTW is short for page table walker, it is hardware page table walker
function. With PTW supported, hardware MMU will parse page table
table and update TLB entries automatically.

This patch adds type OnOffAuto for PTW feature setting.

Signed-off-by: Bibo Mao <maob...@loongson.cn>
---
 target/loongarch/cpu.c | 22 ++++++++++++++++++++++
 target/loongarch/cpu.h |  2 ++
 2 files changed, 24 insertions(+)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 990985708e..92292e6009 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -495,12 +495,29 @@ static void loongarch_set_lasx(Object *obj, bool value, 
Error **errp)
     cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, LASX, value);
 }
 
+static bool loongarch_get_ptw(Object *obj, Error **errp)
+{
+    return LOONGARCH_CPU(obj)->ptw != ON_OFF_AUTO_OFF;
+}
+
+static void loongarch_set_ptw(Object *obj, bool value, Error **errp)
+{
+    LoongArchCPU *cpu = LOONGARCH_CPU(obj);
+    uint32_t val;
+
+    cpu->ptw = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
+
+    val = cpu->env.cpucfg[2];
+    cpu->env.cpucfg[2] = FIELD_DP32(val, CPUCFG2, HPTW, value);
+}
+
 static void loongarch_cpu_post_init(Object *obj)
 {
     LoongArchCPU *cpu = LOONGARCH_CPU(obj);
 
     cpu->lbt = ON_OFF_AUTO_OFF;
     cpu->pmu = ON_OFF_AUTO_OFF;
+    cpu->ptw = ON_OFF_AUTO_OFF;
     cpu->lsx = ON_OFF_AUTO_AUTO;
     cpu->lasx = ON_OFF_AUTO_AUTO;
     object_property_add_bool(obj, "lsx", loongarch_get_lsx,
@@ -508,6 +525,11 @@ static void loongarch_cpu_post_init(Object *obj)
     object_property_add_bool(obj, "lasx", loongarch_get_lasx,
                              loongarch_set_lasx);
     /* lbt is enabled only in kvm mode, not supported in tcg mode */
+    if (tcg_enabled()) {
+        object_property_add_bool(obj, "ptw", loongarch_get_ptw,
+                                 loongarch_set_ptw);
+    }
+
     if (kvm_enabled()) {
         kvm_loongarch_cpu_post_init(cpu);
     }
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index 3c5fcaa154..76e42f6d4e 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -158,6 +158,7 @@ FIELD(CPUCFG2, LBT_MIPS, 20, 1)
 FIELD(CPUCFG2, LBT_ALL, 18, 3)
 FIELD(CPUCFG2, LSPW, 21, 1)
 FIELD(CPUCFG2, LAM, 22, 1)
+FIELD(CPUCFG2, HPTW, 24, 1)
 
 /* cpucfg[3] bits */
 FIELD(CPUCFG3, CCDMA, 0, 1)
@@ -429,6 +430,7 @@ struct ArchCPU {
     uint32_t  phy_id;
     OnOffAuto lbt;
     OnOffAuto pmu;
+    OnOffAuto ptw;
     OnOffAuto lsx;
     OnOffAuto lasx;
     OnOffAuto kvm_pv_ipi;
-- 
2.39.3